I am writing to a FRAM chip from a Propellor chip and have an intermittent fault on some boards.

Propellor chip is a P8X32A ...

http://cdn.sparkfun.com/datasheets/Dev/Propeller/Propeller-P8X32A-Datasheet-v1.4.0_1.pdf

Fram chip is a FM25V05 from cypress

http://www.cypress.com/file/41686/download.

I have attached my pin connections on the Fram.

I am testing a number of these, some pass some fail. I'm writing to the FRAM and reading back for a test.
So I put the oscilloscope on my clock signal into the FRAM to ensure that I was getting the correct clock signal and then suddenly the ones that fail start working when the oscilloscope leads are across the SPI_CLK0 and Ground on the PCB. If I take the leads away its fails again. I disconnect the power from the scope and the FRAM writes and reads ok also, but without the leads across the pins its fails.
A colleague tells me there is around 30pF capacitance in the scope leads so I tried a small 10pF capacitor on the SPI_CLK0 and GND of the FRAM chip and now the units that were failing are now passing. But this seems very strange to me on why this works. I could understand that if this was maybe a decoupling capacitor on the VDD and GND pins then sure as this is standard practice but why would a capacitor on the SPI_CLK pin cause this to work?

Any ideas on why this might be happening?

I should add that I have 2 other pic chips on the SPI bus but these dont appear to be affected from what I can see. I have attached a picture of this schematic also.

Kind Regards

Desmond

 

Maybe:
The effect of the capacitance is to slightly delay the clock signal so there may be a timing error of the SPI signals. The FRAM chip may be more sensitive to this error than the PICs.

 

Hello Albert,

Thank you for your input. Yes , this does appear to the case. I had introduced some short delays in software after the chip select and slowed down the clock speed of the uC but the problems still remained. Its not running very fast in SPI terms just over 25Khz clock signal. The sporadic nature of the problem is strange also. Some boards pass all the time , some fail which led me to think its not a software issue.
Normally one would put the scope on the pins to check the timing but as this fixes the problem its a tough one to debug

 

If you can, try adding a short delay before each clock edge.

 

Is SPI mode set up correctly on the uC?

For if Clock Polarity is set incorrectly, then small shifts on the the timing can change between OK and Error.

Edit: Spelling errors

 

I have been looking closely at that. I have attached the hardware connections of the master uC.
Clock Polarity is low and data is shifted out on the rising edge. I have boards that have never failed but I'm checking all scenarios. Trying to introduce small delays to see if it makes a difference.
So far on the boards that have been failing sporadically the capacitor has worked and the boards haven't failed since modifying with this.