Hi,

I want to calculate the propagation delay of the attached circuit.
I am not able to derive the desired equation for propagation delay.
Can anyone let me know how to do it.

Please respond....

 

What do you understand to be the propagation delay?

Do you mean rise time?

If so then you would derive the circuit transfer function and from that the time domain step response function. From the step response function you can solve for the rise time. If that's what you are looking for......

 

On the rise time approach ...

You'll note that Wikipedia gives an approximate estimate for the 2nd order rise time based on the characteristic equation parameters

http://en.wikipedia.org/wiki/Rise_time

i.e.

\(t_r=\frac{2.23\zeta^2-0.078\zeta+1.12}{\omega_o}\)

These values come from the characteristic Laplace form in the denominator

\(s^2+2\zeta\omega_os+\omega_o^2\)

Using this gives good agreement [~476usec] with the estimate for the 10-90% step rise time I gave in your other post which deals with the same circuit.

FYI I have the denominator term as

\(s^2+3.3547E4s+1.3738E8\)

 

I don't disagree with the rise time analysis, but it is not the same thing as propagation delay. Propagation delay is how long it takes for the output to "begin to respond" to the input and may not be calculable from the circuit parameters of a passive circuit.

Normally, it involves active devices and is determined by the complex mechanics of operating a semiconductor between saturation and cutoff. There is also an asymmetry in time between going from saturation to cutoff and cutoff to saturation.

Now in an ideal 1st order RC circuit there is no propagation delay because the capacitor begins charging immediately. I think cascading two single pole RC filters does not alter the fact that it is a linear circuit without the active components usually responsible for propagation delay.

That is only an opinion -- I could be wrong.

 

You need to know the transmission line characteristics of all the circuit interconnects to be able to determine the total propagation delay from input to output.

I wonder if the OP is referring to group delay? That would make more sense.

http://en.wikipedia.org/wiki/Group_delay

Regards,
Ifixit

 

I don't disagree with the rise time analysis, but it is not the same thing as propagation delay. Propagation delay is how long it takes for the output to "begin to respond" to the input and may not be calculable from the circuit parameters of a passive circuit.

Normally, it involves active devices and is determined by the complex mechanics of operating a semiconductor between saturation and cutoff. There is also an asymmetry in time between going from saturation to cutoff and cutoff to saturation.

Now in an ideal 1st order RC circuit there is no propagation delay because the capacitor begins charging immediately. I think cascading two single pole RC filters does not alter the fact that it is a linear circuit without the active components usually responsible for propagation delay.

That is only an opinion -- I could be wrong.

I'm in total agreement with you Papabravo - that's why I questioned the OP as to what was their understanding of the term "propagation delay" - because it seemed to me this was not applicable in the circuit under consideration. The notion of rise time made more sense to me and I thought that might be what was really required......?

 

@tnk I'm with you on this one.

 

The OP needs to specify something like percent of final value.

 

Hi everyone,

I was just trying to ask, what would be the delay added to the circuit because of charging of capacitor. The two capacitor takes some time for charging. I wanted to know the time taken by the capacitor to charge to 99% of the input voltage..

May be the step rise time is the answer for my query..

 

If God meant for us to calculate stuff like this, he wouldn't have made simulators.

 

Hi RON,

Only simulation will not work for me. i have already done that..
But i have to prove that theoritical result matches the simulation results..
So i had ask for this forum help..

Thanks for all your input..

 

Hi everyone,

I was just trying to ask, what would be the delay added to the circuit because of charging of capacitor. The two capacitor takes some time for charging. I wanted to know the time taken by the capacitor to charge to 99% of the input voltage..

May be the step rise time is the answer for my query..

Well you can find the time domain response to a unit step for this circuit as

\(V_o(t)=1-1.2e^{-0.4774*{10}^4t}+0.2e^{-{2.8774*}{10}^4t}\)

You then solve for the 99% value by setting Vo(t)=0.99 and solving for the unknown t.

 

Well you can find the time domain response to a unit step for this circuit as

\(V_o(t)=1-1.2e^{-0.4774*{10}^4t}+0.2e^{-{2.8774*}{10}^4t}\)

You then solve for the 99% value by setting Vo(t)=0.99 and solving for the unknown t.

Nothing like being precise.
The second term contributes 5.9e-14V.

 

Nothing like being precise.
The second term contributes 5.9e-14V.

That's right - or to put it in more concrete terms that's about 3/5th of a fairy's fart.