Problems with programming a control VDHL file for a chronometer.

Discussion in 'Embedded Systems and Microcontrollers' started by Warch, May 4, 2010.

  1. Warch

    Thread Starter New Member

    May 4, 2010
    Dear Reader,

    First of all my apologies for my English, but I’m doing my best.
    For a school project I have to make an chronometer on an ALTERA UP2 Education Board.
    All my counters (hundreds of seconds, seconds, minutes, hours) work fine on the board.
    The problem is that I have only two 7 digit displays.
    So I can only display hundreds of seconds or seconds, or minutes or hours.
    I made all my counters with flipflops and logic gates since this was asked by my professor.
    Now it is necessary that I make a control block that sends out the hundreds of seconds until this counter recycles (at 100).
    Then I have to display the seconds until the seconds recycles (at 60). Then I have to display the minutes, and so on…. .
    The problem in that since it’s kind of crazy work to make this with logic gates, we have to make this control block in VHDL.
    Implementing the VHDL-block in my scheme with logic gates and flipflops is not a problem.
    I already implemented a frequency divider to divide the frequency of my oscillator.
    The problem is that I have to write this control block, and I’m not familiar with VHDL.
    I already wrote down some code and compiled, recompiled, search for my faults, recompiled, … .
    When I solved a problem there always was a new one.
    I have spent many hours searching and debugging but, now I stuck.
    So I was wondering if a nice person could help me find my faults.
    I’m familiar with c# programming (advanced), c++ (basic), JavaScript(basic), actionscript(basic) and XML(basic) if that helps.

    Please note that the inputs are all separate bits and not bit-vectors.
    “HSecDoorlopen” is a boolean which says that the hundreds of seconds are passed and “Uur” is Dutch for Hours.
    Also the hour-counter recycles at 23. (0-23 displayed).
    Normally all inputs and outputs are active low, but for simplicity I putted them active high.
    Also I have to implement 4 master signals by DIP-switches.
    If the counter is for example displaying minutes, but I want to show to seconds by making the DIP-switch high (1), the seconds have to display and the counters needs to count further.
    When no DIP-switch is selected (all 4 = 0), just display the standard mode where the highest counter that is counting will display (in this example back to minutes).
    But I will be glad if I can display the standard mode, and I think I will find how to implement the DIP-switches myself, but all help is welcome.

    Thanks in advance,

    P.S. In attachment my VHDL-file and an image to visualize my education board.
    Last edited: May 6, 2010