Hey friends,

So I have been working on my video generation circuit for monochrome PAL.

Basically I have a few counters, one for counting the line number and another for counting the column number.

To find VSYNC, I then use some logic gates to find when the line is either 1, 2 or 3, and when it is, then the final signal is made low.

I do the same for horizontal sync, but I count columns instead, and if the column is either 1 or 2, then HSYNC is made low.


However I am having some problems. When I look at the output on my scope, I find the signals, and VSYNC seems ok, however HSYNC is unstable, and it doesnt show properly, the part that should be high shows on the scope and both high and low. it seems the scope cant work out what it is, however the scope is 100MHZ and my signal is just 15KHz.

I think this is due to the fact that this circuit is asynchronous in that I am using logic gates to compare the counter outputs and immediately use that as the final SYNC signal. Is his the problem?

Whenever the counter changes, then the logic gates will obviously start oscillating like crazy, and then stabilize, however on the scope it just shows as a mess of signals.

What should I do? Should I use flip flops to record the signals before using them ? If I use the column counter clock (2us) for the flip flop, and so at each clock edge, after the gates have worked out the output, I clock the result into the flip flop and use that. But won't the flip flop oscillate in between either? Maybe it shouldnt since a flip flop is really a more sophisticated Latch, and hence if the result is the same between clocks then the output will be stable.


Please help and thank you!

 

Hey friends,

So I have been working on my video generation circuit for monochrome PAL.

Basically I have a few counters, one for counting the line number and another for counting the column number.

To find VSYNC, I then use some logic gates to find when the line is either 1, 2 or 3, and when it is, then the final signal is made low.

I do the same for horizontal sync, but I count columns instead, and if the column is either 1 or 2, then HSYNC is made low.


However I am having some problems. When I look at the output on my scope, I find the signals, and VSYNC seems ok, however HSYNC is unstable, and it doesnt show properly, the part that should be high shows on the scope and both high and low. it seems the scope cant work out what it is, however the scope is 100MHZ and my signal is just 15KHz.

I think this is due to the fact that this circuit is asynchronous in that I am using logic gates to compare the counter outputs and immediately use that as the final SYNC signal. Is his the problem?

Whenever the counter changes, then the logic gates will obviously start oscillating like crazy, and then stabilize, however on the scope it just shows as a mess of signals.

What should I do? Should I use flip flops to record the signals before using them ? If I use the column counter clock (2us) for the flip flop, and so at each clock edge, after the gates have worked out the output, I clock the result into the flip flop and use that. But won't the flip flop oscillate in between either? Maybe it shouldnt since a flip flop is really a more sophisticated Latch, and hence if the result is the same between clocks then the output will be stable.


Please help and thank you!

Why are you trying to reinvent the wheel? Aren't there chips to do this for you already?
Or are they obsolete?

 

Would anyone like to help me please ?

 

Would anyone like to help me please ?

Apparently not. You may find some NTE substitute chips still available, like NTE1550 I think it was. Or find an old TV and salvage parts. Google TV sync IC?
You might find a suggested circuit in an old TV sync chip data sheet. TDA4503 (?)
Or LA7850.

 

Apparently not. You may find some NTE substitute chips still available, like NTE1550 I think it was. Or find an old TV and salvage parts. Google TV sync IC?
You might find a suggested circuit in an old TV sync chip data sheet. TDA4503 (?)

They will help later. I'm not using chips. I want to build it with TTL.

 

They will help later. I'm not using chips. I want to build it with TTL.

Good Luck. If you decide to use a chip I found a couple of MM5321 among old stash. It is a sync generator for a TV camera. I think interest in design details has gone obsolete in this field. I'll be glad to send you a couple of chips just to see that they get a good home. Or LA7850.
I think I got them from Jameco electronics. They may still carry them. (Oops, checked. no they don't)

Do you have a schematic you can post. It is hard to troubleshoot otherwise.

 

It is not very likely you will get any answers until you post a clear schematic of just what your circuit is.

 

My approach would be to design a circuit that utilizes the rising and falling edge of the clock to transmit signals around and eliminate any asynchronous logic.

**Edit: I meant asynchronous!

 

You cant use asynchronous counters with gates to get counts.
You have to use a synchronous counter.
Asynchronous counters output edges don't occur at the same time and can causes races or glitches.

 

Good Luck. If you decide to use a chip I found a couple of MM5321 among old stash. It is a sync generator for a TV camera. I think interest in design details has gone obsolete in this field. I'll be glad to send you a couple of chips just to see that they get a good home. Or LA7850.
I think I got them from Jameco electronics. They may still carry them. (Oops, checked. no they don't)

Do you have a schematic you can post. It is hard to troubleshoot otherwise.

I would happily accept the chips. I can try using them. What's your email ?

 

You cant use asynchronous counters with gates to get counts.
You have to use a synchronous counter.
Asynchronous counters output edges don't occur at the same time and can causes races or glitches.

That's strange look, I took the counter, and took just 2 outputs from it, sent them to an AND gate, and watched the output on the scope. The output was crazy. However, the outputs from the counter are stable when I look at them individually on the scope. How can such crazy thing happen? Just passing them thru an AND gate will destroy them ?

This guys circuit is similar to mine. He even used the same 74HC4040 counter. And logiv afterwards. His circuit works whereas mine doesnt.,

 

Thanks everyone

 

That's strange look, I took the counter, and took just 2 outputs from it, sent them to an AND gate, and watched the output on the scope. The output was crazy.

Look at both signals at once with a scope, and see what the delay is between the two. It will be significant and probably even variable.

 

Look at both signals at once with a scope, and see what the delay is between the two. It will be significant and probably even variable.

Hmm... The two waveforms show fine on the scope, just the output from the gate is nuts. So you mean that the delay must be variable. Because if it weren't there wouldn't be a problem since a constant delay wouldn't cause problems of this sort....

 

Did you look at both of them at the same time?

 

Did you look at both of them at the same time?

Yes...

 

Can you show your circuit?

 

Can you show your circuit?

Friend, my circuit is just a binary ripple counter and an OR gate. I take two outputs from the counter (bits 4 and 3), and send them to the OR gate, and look at the output, then I see that the output is a big mess and I cant understand why such simple circuit will not work. It seems nobody knows either

 

"A big mess" means many things to many people. Perhaps take a picture?

 

Friend, my circuit is just a binary ripple counter and an OR gate. ...

Yes, but that "just a counter" consists of unknown parts, connected in some unknown way (especially the unused inputs), and is running at unknown clock rate, and off an unknown voltage. Perhaps there are decoupling capacitors, perhaps not. I don´t have my crystal ball with me, so it is reall hard to debug a mystery circuit relying only on observations and descriptions like "output is a big mess".
And like ErnieM said, a screenshot or a picture would help too.