problem with Xilinx ise 9.1 simulator

Discussion in 'General Electronics Chat' started by nabilos23, Jul 17, 2009.

  1. nabilos23

    Thread Starter New Member

    Jul 17, 2009
    1
    0
    hello all
    iam using Xilinx ISE 9.1 to implement a Verilog program in my FPGA spartan3, BUT my problem is the following:
    When i check syntax i have so many erros, all erros are that Xilinx ISE 9.1 does not recognize any logic gates of my Verilog NETLIST, the error is -> Could not find module/primitive 'NOR3' or NAND2, INV0 etc......
    do you think it's a problem of lack library?
    My Verilog NETlist is:

    module logique_de_controle_dicho ( Clk, Rst, niv_compar, calib_start, calib_ok,
    DATA, test_si1, test_so1, test_si2, test_si3, test_se);
    output [7:0] DATA;
    input Clk, Rst, niv_compar, calib_start, test_si1, test_si2, test_si3,
    test_se;
    output calib_ok, test_so1;
    wire n_0, n_2, n_3, n_4, n_5, n_6, n_7, n_8, n_9, n_10, n_11, n_12, n_13,
    n_14, n_15, n_16, n_17, n_18, n_19, n_20, n_21, n_22, n_23, n_24,
    n_25, n_26, n_27, n_28, n_29, n_30, n_31, n_32, n_33, n_34, n_35,
    n_36, n_37, n_38, n_39, n_41, n_42, n_43, n_44, n_45, n_46, n_47,
    n_48, n_49, n_50, n_51, n_52, n_53, n_54, n_55, n_56, n_57, n_58,
    n_59, n_60, n_61, n_62, n_63, n_64, n_65, n_66, n_67, n_68, n_69,
    n_70, n_71, n_72, n_73, n_74, n_75, n_76, n_77, n_78, n_79, n_80,
    n_81, n_82, n_86, n_87, n_88, n_89, n_90, n_91, n3, n6, n7, n8, n9;
    OAI220 g2812 ( .A(n_59), .B(n_0), .C(n_81), .D(n_70), .Q(n_82) );
    INV0 g2822 ( (n_75), (n_81) );
    INV0 g2819 ( .A(n_77), .Q(n_80) );
    OAI220 g2827 ( .A(n_78), .B(n_88), .C(n_52), .D(n_26), .Q(n_79) );
    AOI220 g2820 ( .A(n_49), .B(calib_start), .C(n_54), .D(n_37), .Q(n_77) );
    INV0 g2828 ( .A(n_69), .Q(n_76) );
    OAI210 g2823 ( .A(n_67), .B(n_65), .C(n_57), .Q(n_75) );
    OAI210 g2825 ( .A(n_91), .B(n_78), .C(n_66), .Q(n_74) );
    AOI210 g2824 ( .A(n_48), .B(n_71), .C(n_86), .Q(n_73) );
    OAI220 g2826 ( .A(n_71), .B(n_37), .C(n_47), .D(n_70), .Q(n_72) );
    AOI220 g2829 ( .A(n_68), .B(n_67), .C(n_51), .D(DATA[7]), .Q(n_69) );
    OAI210 g2838 ( .A(n_25), .B(n_11), .C(n_68), .Q(n_66) );
    NOR30 g2845 ( .A(n_56), .B(n_62), .C(DATA[0]), .Q(n_65) );
    OAI310 g2846 ( .A(n_27), .B(n_70), .C(n_33), .D(n_43), .Q(n_64) );
    .
    .
    .
    .
    .
    .
    end module
    if someone can help I will be recognizing
    thank you
    Nabilos
     
Loading...