[PROBLEM]BLOCK RAM inferencing failed

Discussion in 'Embedded Systems and Microcontrollers' started by fantomass, Oct 16, 2010.

  1. fantomass

    Thread Starter New Member

    Oct 16, 2010
    1
    0
    Hello,

    I am using Altium Designer Summer08 and a Nanobord 3000. I made a data memory, and when i try to compile I get this error: BLOCK RAM inferencing failed, output is not synchronous. For this error I use Altium synthesizer, but if I switch to DXP synthesizer it compile, but the wave I see with the LAX is not what I expected.
    Code for memory:
    Code ( (Unknown Language)):
    1. library IEEE;
    2. use IEEE.STD_LOGIC_1164.ALL;
    3. use IEEE.STD_LOGIC_ARITH.ALL;
    4. use IEEE.STD_LOGIC_UNSIGNED.ALL;
    5.  
    6. entity memory_data is
    7.  port (di_bus : in STD_LOGIC_VECTOR(15 downto 0);
    8.        ddo_bus : out STD_LOGIC_VECTOR(15 downto 0);
    9.        a_bus : in STD_LOGIC_VECTOR(9 downto 0);
    10.        nce : in STD_LOGIC;
    11.        rd, wr : in STD_LOGIC;
    12.        dready : out STD_LOGIC);
    13. end memory_data;
    14.  
    15. architecture bhv of memory_data is
    16.  type memory_array_data is array (0 to 31) of STD_LOGIC_VECTOR(15 downto 0);
    17. begin
    18.  dready <= '1';
    19.  process (nce, rd, wr, di_bus, a_bus) is
    20.   variable mem_data : memory_array_data;
    21. begin
    22.   if nce = '0' then
    23.    if rd = '1' then
    24.     ddo_bus <= mem_data(conv_integer(a_bus));
    25.    end if;
    26.    if wr = '1' then
    27.       mem_data(address) := di_bus;
    28.    end if;
    29.   end if;
    30.  end process;
    31. end architecture bhv;
    What can I do?

    Thanks!
     
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