I'm getting shoot through aplenty at M1's and M2's gates...
gonna have to generate that squarewave manually to include deadtime

 

Couldn't make it work that way... the negative output is giving me -10V instead

You missed a connection: the left end of R2 should be connected to the inverting input of U2.

 

I'm getting shoot through aplenty at M1's and M2's gates...
gonna have to generate that squarewave manually to include deadtime

I don't understand the "at M1's and M2's gates" part: shoot-through current is when both of your MOSFETs are conducting at the same time.

 

You missed a connection: the left end of R2 should be connected to the inverting input of U2.

Ahhhh... THAT explains a LOT... thanks!
The previous circuit gave me advantage of being able to adjust the negative side of the reference... could that also be done here without complicating things too much?

 

Ahhhh... THAT explains a LOT... thanks!
The previous circuit gave me advantage of being able to adjust the negative side of the reference... could that also be done here without complicating things too much?

Of course! The voltage gain of U1 & U2 is simply -R2/R3, so your -7V can be trimmed by adjusting either of those two resistors.

 

So all I have to do is join R2 and R3 into a 5K trimpot... with the wiper connected to C1?
Edit: I meant connect the trimpot's wiper to the node where C1 and the inverting input of U2 meet.

 

Yup.

Or, you could just use 0.1% resistors for R2 and R3, and be done with it. They're actually not very expensive, much cheaper than a good trimpot.

 

Yup.

Or, you could just use 0.1% resistors for R2 and R3, and be done with it. They're actually not very expensive, much cheaper than a good trimpot.

Already considered that... what I'm going to do is place a 1K trimpot between a couple of 3.3K resistors, that way I'll be able to fine tune the negative voltage, which will later help me adjust for offset at the load cell's amplifier output.

 

Found an application note that might be of interest:

http://cds.linear.com/docs/en/application-note/an43f.pdf

 

Found an application note that might be of interest:

http://cds.linear.com/docs/en/application-note/an43f.pdf

Thanks! I had already seen some of the circuits, but I've never seen that complete document before. It's quite extensive, but it seems like it's very much worth reading.

 

Almost done here... I generated a couple of PWL tables in an excel spreadsheet to make sure there was deadtime between fet switching. Positive switching at the probe is behaving beautifully, but the negative side had some ugly ringing in it. That is until I added a tantalum (electrolytic wouldn't cut it) cap on the negative output of the reference. Then the ringing got way better, lasting only about 20us, with a max amplitude of 20mV out of the -7V.

I know that that ringing comes from the reference's negative output, since it's present in the exact shape at both the probe point and at that output.
Strange thing is that if I were to cut the 70 ohm (R5) from the negative output the sim will slow down to a crawl.

 

Strange thing is that if I were to cut the 70 ohm (R5) from the negative output the sim will slow down to a crawl.

Spice sometimes does funny things. The thing to keep in mind is that it does NOT perfectly model the real world, and your circuit in actual operation may or may not do things that you see in Spice.

Proceed with caution-- and skepticism.

 

...Proceed with caution-- and skepticism.

... and trust no one, Mr Mulder ...

Seriously now, I removed R5 from the circuit, and as I said, the sim slowed to a crawl, but the end result was exactly the same, almost perfect square wave, with a little ringing in the negative part at the probe node.
I think we're pretty much done here. And I'm ready to build the thing and incorporate it in the circuit that I discussed with crutschow in this thread.

 

... and trust no one, Mr Mulder ...

Seriously now, I removed R5 from the circuit, and as I said, the sim slowed to a crawl, but the end result was exactly the same, almost perfect square wave, with a little ringing in the negative part at the probe node.
I think we're pretty much done here. And I'm ready to build the thing and incorporate it in the circuit that I discussed with crutschow in this thread.

Good. I'll be interested in hearing how it all turns out.

 

Update:
I removed C2 from the last circuit, and the small ringing at the negative side of the square wave is almost completely gone now.
From the LT1010's datasheet, I'm guessing that C2 was there to facilitate driving capacitive loads. But in this case, we're driving a completely resistive load, so C2 maybe serves no purpose.

 

Update:
I removed C2 from the last circuit, and the small ringing at the negative side of the square wave is almost completely gone now.
From the LT1010's datasheet, I'm guessing that C2 was there to facilitate driving capacitive loads. But in this case, we're driving a completely resistive load, so C2 maybe serves no purpose.

But what about C3 & C5? That's a capacitive load, and a very heavy one at that.

 

But what about C3 & C5? That's a capacitive load, and a very heavy one at that.

Those caps are only there as flywheels (I think) and only behave as loads during startup. After that they deliver charge to stabilize current during switching peaks.... did I make sense?

 

In fact, I added much larger caps on both negative and positive outputs. And the circuit's performance improved significantly in both instances.

 

Those caps are only there as flywheels (I think) and only behave as loads during startup. After that they deliver charge to stabilize current during switching peaks.... did I make sense?

Ummm... no. What are "flywheels"? I'm not familiar with that term in an electronics context. And why do they only behave as loads during startup? They're connected to the output of the LT1010, and are therefore a load. Does the LT1010 datasheet or any of the appnotes referencing the LT1010 (e.g., AN4, http://cds.linear.com/docs/en/application-note/an04f.pdf) recommend them?

In general, it's important to really, REALLY take care when capacitively loading the outputs of opamps, buffers, instrumentation amps and such all; many devices don't take kindly to capacitive loads, and are apt to oscillate.

In fact, I added much larger caps on both negative and positive outputs. And the circuit's performance improved significantly in both instances.

Watch out for over-relying on the simulator: it only goes so far, and it's easy to waste a lot of time chasing phantom behavior that turns out to be an artifact of the simulation process that doesn't actually occur in the actual circuit. The opposite happens, too: real circuits often do very screwy things that a simulation won't even hint at.

At some point, you have to buy some parts and build some circuits and make some measurements, to really tell whether something is going to work or not. My gut sense is you're at or near that point.

 

Ummm... no. What are "flywheels"? I'm not familiar with that term in an electronics context. And why do they only behave as loads during startup? They're connected to the output of the LT1010, and are therefore a load. Does the LT1010 datasheet or any of the appnotes referencing the LT1010 (e.g., AN4, http://cds.linear.com/docs/en/application-note/an04f.pdf) recommend them?

In general, it's important to really, REALLY take care when capacitively loading the outputs of opamps, buffers, instrumentation amps and such all; many devices don't take kindly to capacitive loads, and are apt to oscillate.


Watch out for over-relying on the simulator: it only goes so far, and it's easy to waste a lot of time chasing phantom behavior that turns out to be an artifact of the simulation process that doesn't actually occur in the actual circuit. The opposite happens, too: real circuits often do very screwy things that a simulation won't even hint at.

At some point, you have to buy some parts and build some circuits and make some measurements, to really tell whether something is going to work or not. My gut sense is you're at or near that point.

Keep in mind that you're talking to a mechanical engineer here... so my electronics analogies might seem alien (even inadequate) to people in the field... What I meant by the "flywheel" analogy, was that I was just using the capacitors to stabilize voltage output at the beginning of the negative switching cycle. And we're switching only a resistive load... the caps are there to (maybe) compensate capacitive load from the load cell's wires and the load cell itself... which (I'm guessing) should be an extremely small capacitive load.
BUT... I take your opinion very seriously, and I'm glad you've warned me about how opamps are susceptible to oscillations when dealing with capacitive loads... what puzzles me a little is that glitching at the beginning of the negative cycle was reduced when I removed the cap between the feedback in the LT1010 and the opamp's inverting input, whereas the glitch was reduced even further when I added the caps at the output of the LT1010.

Here are the differences with and without the caps:





Since you've already warned me, I'll keep an eye out for the possible effects that you've just mentioned... the good thing is that I can always remove the caps if there's need... but it's also good to lay aside traces and space in the PCB if their presence is required.