PLL Senior Project

Discussion in 'The Projects Forum' started by indef, Oct 30, 2012.

  1. indef

    Thread Starter New Member

    Oct 30, 2012
    Hello Everyone. I'm new to these forums so please forgive me if this has already been discussed.

    My senior design project for my Electrical Engineering degree is to build a discrete PLL that locks between 1kHz and 100kHz.

    Everything must be made using discrete parts (no ICs, no op-amps). I also am not allowed to use a phase-frequency-detector (PFD) for the detection stage of the system.

    Currently I am trying to tackle how to build the VCO. I have already thoroughly tested ring oscillators in the lab and have ruled them out because they oscillate too quickly (MHz range) and their peak-to-peak voltage changes with the control voltage which I can't have.

    Does anyone have an idea of how to design a low frequency VCO which has a constant VPP of 5V? Ideally the output waveform is a square wave, but if not that is ok I can build a schmitt trigger to take care of that.

    Any help is greatly appreciated. Thanks.
  2. crutschow


    Mar 14, 2008
    Have you looked at wiki?
  3. vk6zgo

    Active Member

    Jul 21, 2012
    It seems strange that they want you to go all discrete,but I guess,if that's what they want,so be it.
    An operating range of between 1kHz & 100kHz is huge,& lets out a lot of the options I was going to offer,like multivibrators,blocking oscillators,etc.

    A free running Audio oscillator & a 1KHz harmonic generator is a possibility,
    with the Osc locking to each discrete harmonic in turn.
    Some early PLLs worked that way.

    Another thought is two RF Oscillators,one fixed,& one lockable beating together over the range required,but it is getting big & clunky!:D
  4. DickCappels


    Aug 21, 2008
    Or, you can probably make a two transistor multivibrator.

    Tie the tops of R2 and R3 to the control voltage. When the control voltage is high it will oscillate at a high frequency. The low frequency at which this circuit stops oscillation is determined by the gain of the transistors and to some extent upon the matching of Vbe of the transistors. Keep the collector currents equal to minimize differences in Vbe.

    It should be able to accomplish the 100:1 range that you desire.

    A variation on this circuit, a direct coupled RS flip-flop can serve as a phase detector. I'm not sure whether this would qualify as a phase-frequency detector, but it will work well over a wide range of frequencies.
  5. indef

    Thread Starter New Member

    Oct 30, 2012
    Thanks for your response. Where would I tie R1 and R2? Would I just use a voltage that would give me the proper bias current to achieve the oscillation range I'm looking for? Could you elaborate a bit on how the BJTs switch to dump their voltages and thus oscillate?

    As for the phase detector... From my research I've learned that I will have to use a PFD since a phase only detector only works for small differences in frequency. I asked my professor and what he said was meant by saying we can't use a PFD is we can't use a pre-made one or one made from logic level parts (flip flops, gates, etc).

    I have a good understanding of MOSFETs and I think I can build my own D flip flops and logic gates to make my own PFD. The trick will be fitting all the transistors into the space given for the project (5" x 5" x 3").

    The RSFF can be used as a phase detector but I would still need some form of frequency detector as well. If my input voltage is 100kHz and let's say my VCO is sitting at 20kHZ... I'm going to lock on harmonics all over the place if I'm only using the phase detector.

    Thanks for your help!
  6. indef

    Thread Starter New Member

    Oct 30, 2012
    Yeah part of our project is to make us think and suffer through old technologies to get an appreciation for what we have now.

    What exactly is a free running audio oscillator? Would I only be able to lock on harmonics of 1kHz?

    I'm currently working on a design for a VCO that is just a brute force approach to the theory of operation for a VCO. I'm going to have a current mirror who's reference current is decided by my input voltage...the mirror will source current into two CMOS inverters which have a cap between their common drains. This should in theory produce a triangle waveform as the gates of the two inverters are switched. The next stage will be using a comparator to control some sort of flip flop which dumps one side of the cap and changes the flip flop state to create a square wave.

    Again this is just a theory I've kinda mashed together from research. When I draw up a schematic (tomorrow) I'll post it up and see if you guys think it will work.