Please Help!!

Discussion in 'Homework Help' started by jkane121, Mar 3, 2011.

  1. jkane121

    Thread Starter New Member

    Mar 3, 2011
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    0
    Im in a test right now, and I need to write a VHDL program to implement in a CPLD a 5-digit BCD adder.

    Im to assum that the following components in the design hierarchy have been implemented in .vhd files that are stored in the same directory as the program.

    -- Full adder in full_add.vhd
    -- 4-bit parallel adder in addpar4.vhd
    -- single digit bcd adder in bcd_add.vhd

    The program that I am creating just isnt working right,, If someone could paste a program so I can check mine that would be awesome!!

    THANKS
     
  2. blueroomelectronics

    AAC Fanatic!

    Jul 22, 2007
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    It's a test designed to demonstrate your knowledge, you're supposed to have studied. Plus a forum response can day anywhere from minutes to days to forever.
     
  3. R!f@@

    AAC Fanatic!

    Apr 2, 2009
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    on this I'll say forever...
     
  4. bertus

    Administrator

    Apr 5, 2008
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