Hi chaps
Below is a past exam PIC16F84A question and my solution which does not agree with the supplied answer.
Question1
Briefly explain what the following directive tells the assembler to do:
CBLOCK 0x0C.........................., ENDC.
Question 2
The subroutine listed below implements a fixed delay. Determine the total number of PIC16F84 instruction cycles that would occur in using this subroutine to create a delay in a program. Exclude the CALL instruction that will use this subroutine. Show full working.
Count EQU 0x0C
F EQU 1
Sub MOVLW 0x10
MOVWF Count
SubLoop NOP
DECFSZ Count,F
GOTO SubLoop
RETURN
my solution:
Instruction Cycles Total executions
MOVLW 1 1
MOVWF 1 1
NOP 1 1
DECFSZ 1 n-1
GOTO 2 2(n-1)
DECFSZ 2 2
RETURN 2 2
Total Instruction cycles = 3n + 4 = 34 cycles
n = numerical delay value loaded into the w register.
Correct answer = 67 cycles
may you correct me or the anwer!
Below is a past exam PIC16F84A question and my solution which does not agree with the supplied answer.
Question1
Briefly explain what the following directive tells the assembler to do:
CBLOCK 0x0C.........................., ENDC.
Question 2
The subroutine listed below implements a fixed delay. Determine the total number of PIC16F84 instruction cycles that would occur in using this subroutine to create a delay in a program. Exclude the CALL instruction that will use this subroutine. Show full working.
Count EQU 0x0C
F EQU 1
Sub MOVLW 0x10
MOVWF Count
SubLoop NOP
DECFSZ Count,F
GOTO SubLoop
RETURN
my solution:
Instruction Cycles Total executions
MOVLW 1 1
MOVWF 1 1
NOP 1 1
DECFSZ 1 n-1
GOTO 2 2(n-1)
DECFSZ 2 2
RETURN 2 2
Total Instruction cycles = 3n + 4 = 34 cycles
n = numerical delay value loaded into the w register.
Correct answer = 67 cycles
may you correct me or the anwer!
