Got this little blighter working ok , a2d working but when i look at the adresh and adresl files which are the results of the a2d , they both are the same values and not the usual lower 2 bits in adresl and upper 8 bits in adresh, yet its set to left justified,
tried the same routine on my usual 18f24k22, works perfect left or right justified the 8 and 2 bits are in different files,
if i get the adresh file and put it to the gpio output ,the leds flicker on and off counting up as they should do as i rotate the preset on port An0,
no probs there yet if i look at adresl its the same all leds flicker and counting , they should be the lower two bits as i am using left justified,
why is the adresh and adresl showing the same values, is there something in the chip or programme that makes it not work like the 18f pic?
Here is the AD setup in Asm
AD ; a to d routine for pot on an0 pin 7,
bsf STATUS,RP0 ; banks select 1
movlw b'11001001' ; Specifiy GPIO port direction
movwf TRISIO ; Set GPIO ports as xx0OIOO1 gp1-2 4-5 output, gp0,3 input
movlw b'01110001' ; set AN0 to analogue input bit 0, int rc osc,
movwf ANSEL
bcf STATUS,RP0 ; bank 0
movlw b'00000001' ; a/d on AN0 left justified bit 7=0, int ref vdd bit 6,set bit 1 to start conversion
movwf ADCON0
movlw b'0000111' ; turn off comparators pg 37
movwf CMCON ; put to reg
bsf ADCON0,1 ; start conversion
hold
btfsc ADCON0,1 ; is it done yet?
goto hold ; no
bsf STATUS,RP0 ; bank 1
clrf ANSEL ; ports to digital I/O
clrf TRISIO ; set ports to output
bcf STATUS,RP0 ; bank 0
return
tried the same routine on my usual 18f24k22, works perfect left or right justified the 8 and 2 bits are in different files,
if i get the adresh file and put it to the gpio output ,the leds flicker on and off counting up as they should do as i rotate the preset on port An0,
no probs there yet if i look at adresl its the same all leds flicker and counting , they should be the lower two bits as i am using left justified,
why is the adresh and adresl showing the same values, is there something in the chip or programme that makes it not work like the 18f pic?
Here is the AD setup in Asm
AD ; a to d routine for pot on an0 pin 7,
bsf STATUS,RP0 ; banks select 1
movlw b'11001001' ; Specifiy GPIO port direction
movwf TRISIO ; Set GPIO ports as xx0OIOO1 gp1-2 4-5 output, gp0,3 input
movlw b'01110001' ; set AN0 to analogue input bit 0, int rc osc,
movwf ANSEL
bcf STATUS,RP0 ; bank 0
movlw b'00000001' ; a/d on AN0 left justified bit 7=0, int ref vdd bit 6,set bit 1 to start conversion
movwf ADCON0
movlw b'0000111' ; turn off comparators pg 37
movwf CMCON ; put to reg
bsf ADCON0,1 ; start conversion
hold
btfsc ADCON0,1 ; is it done yet?
goto hold ; no
bsf STATUS,RP0 ; bank 1
clrf ANSEL ; ports to digital I/O
clrf TRISIO ; set ports to output
bcf STATUS,RP0 ; bank 0
return
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