Hi again,

I've been reading through the PIC Tips and Tricks Guide, and I came across something I thought was interesting and didn't fully understand. When interfacing 5V high current device outputs with 3.3V uC device inputs, the guide shows a really simple transistor clamp, shown below.



I'm familiar with using logic level FETs to interface 3.3V and 5V devices, but how does this differ from that? How would you go about selecting the transistor and the value for R1?

My thinking was that just as you can switch a higher voltage with a FET, the same could be done in reverse (i.e. switch 3.3V on and off with a 5V input). Is this incorrect, or is the transistor clamp described a better method? Thanks in advance.

 

I'm aware of no universal technique for the task you've described. The technique you illustrated is not a perfect 'clamp' at 3.3 volts . . . the junction transistor has a Vbe bias value of not less than 0.5 volts. This means that when the emitter tries to rise to the high level 5.0 volts, it will exceed the 3.3 volt base bias by about .5 volts . . . or 3.8 volts.

Check the specifications for inputs on the 3.3 volt device. I've successfully driven 12 C-Mos inputs from 28 volt signals by simply using a sufficiently large series resistor. For example, the 4000 series c-mos is fitted with input protection diodes rated for 1.0 mA of current that might tend to exceed the device's ratings. Suppose my input series resistor is 47K. That limits the over-drive current to the protective diodes to (28-12)/47,000 or 340 uA of overdrive . . . well within the capabilities of the device.

This is but one example of the need to KNOW YOUR DEVICES well enough to craft a interface that meets your design goals while staying within published limits for the device.

 

I think I understand what you're saying about the extra half a volt. When I was talking about logic level FETs, I was talking about something like the 2N7002T configured as shown.



EDIT: Whoops, I forgot to show the output voltage of that configuration. The output voltage would be present at the drain of the FET.

The 2N7002T has a gate threshold voltage of 2V, so it would easily turn on, and most of their test conditions are listed at Vgs = 10V, so a max of 8V I'm assuming would be fine. I've used a configuration similar to this to switch 5V from 3.3V, but never the reverse as shown. Any thoughts? My input device would be a PIC18F45K20, capable of sinking/sourcing 25 mA max.

Basically, I'm trying to figure out how to interface the status pins of this device with my microcontroller. From the datasheet, it looks like when a fault occurs (open load or current limit sense), Vis is present at the status pin. This voltage is in the range of 5-8V. I'm trying to set it up so that an input goes high when Vis is present at the status pin of the BTS5242.

I've never dealt with the BTS5242 or a device with similar status pins, so any info on something like this would be great. Thanks for being patient with a beginner

 

I should probably add that a resistive divider should be added at the gate of the MOSFET as well. Modified image is shown.



I've just tested this theory with an NTE2984 and it works as I thought it would. Can anyone think of any complications of this configuration?

 

What about using a 3.3v zener diode in a voltage divider? You could use a resistor on the 5v source side and a zener on the ground side.

+5vdc------/\/\/\/-------3.3v here-------->|---------Gnd

 

Hi again,

I've been reading through the PIC Tips and Tricks Guide, and I came across something I thought was interesting and didn't fully understand. When interfacing 5V high current device outputs with 3.3V uC device inputs, the guide shows a really simple transistor clamp, shown below.



I'm familiar with using logic level FETs to interface 3.3V and 5V devices, but how does this differ from that? How would you go about selecting the transistor and the value for R1?

My thinking was that just as you can switch a higher voltage with a FET, the same could be done in reverse (i.e. switch 3.3V on and off with a 5V input). Is this incorrect, or is the transistor clamp described a better method? Thanks in advance.

The way this works is that when the voltage on the 3.3Y input rises above (3.3+Vbe)V, the transistor turns on and keeps the voltage at (3.3+Vbe)V. This is an emitter follower configuration, thus the minimum resistor value is:

\(Rmin=\frac{5-(3.3+Vbe)}{Icmax}\)


Although it is easier to use a resistor voltage divider to convert the 5V to 3.3V, this circuit provides protection from voltage spikes too. To improve it, it would be better to use around 2.5V on the base of the transistor as to clamp the voltage below 3.3V.