PIC I/O Droop

Discussion in 'The Projects Forum' started by blah2222, Mar 22, 2014.

  1. blah2222

    Thread Starter Well-Known Member

    May 3, 2010
    554
    33
    Hi all,

    I am using an optocoupler to isolate I/O pulses (200 KHz 50% DC) from a PIC18F2550 and I am noticing that the I/O voltage is not holding to a steady Vdd even when the current source limit is being withheld (25 mA for this PIC).

    I am using a 4N33 optocoupler which has a pretty constant ~1.2V drop across its LED and I placed a series resistor between the 4N33's LED and PIC's I/O port to take some measurements:

    <br />
<br />
\begin{tabular}{|c|c|c|c|c|c|}<br />
\hline<br />
V_{DD} (V) & \bf{R_{series} (ohm)} & \bf{V_{IO} (V)} & \bf{V_{LED} (V)} & \bf{I_{IO} (mA)} & {\bf{I_{ideal} (mA)}} \\ \hline<br />
5.00    & open circuit           & 5.00               & -                    & -                   & -                                            \\ \hline<br />
5.00    & 340                    & 4.48               & 1.16                 & 9.7                   & 11.1                                         \\ \hline<br />
5.00    & 200                    & 4.16               & 1.20                 & 14.8                & 18.9                                         \\ \hline<br />
5.00    & 100                    & 3.48               & 1.22                 & 22.6                & 37.8                                         \\ \hline<br />
5.00    & 10                     & 1.54               & 1.22                 & 32.0                & 378                                          \\ \hline<br />
5.00    & 1                      & 1.26               & 1.22                 & 40.0                & 3780                                         \\ \hline<br />
\end{tabular}<br />
<br />

    I understand why having 100 ohms or less are causing the I/O output to sag, but I am unsure why the cases with ideal currents much lower than the limit (25 mA) are drooping. I have tried this moving from high valued resistors to low, and this PIC is fully operational, so I don't suspect it is damaged.

    I don't really want to put a buffer op-amp in between as the level isn't too important, but I was curious what people had to say.

    Could it possibly be a frequency response issue?
     
  2. RamaD

    Active Member

    Dec 4, 2009
    254
    33
    The specifications are not that port IO port pins when high will be steady at Vdd at 25mA. Check on ouput high voltage specifications for IO ports (Voh). It is stated to be better than Vdd-0.7 at some current of say 2.5-3mA, which varies for different parts.
     
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  3. crutschow

    Expert

    Mar 14, 2008
    13,013
    3,233
    The output port transistors have an impedance that limits the maximum current and causes a drop in the output voltage as the output current increases. This impedance changes some with current and, according to you measurements, appears to vary from about 50Ω to 90Ω as the current increases. That is what you are seeing.
     
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  4. THE_RB

    AAC Fanatic!

    Feb 11, 2008
    5,435
    1,305
    3.48v supplying 22.6mA sounds low to me. I would expect the pin voltage to be >4v when sourcing 22.6mA.

    I think in your testing of the pin voltage "sag" you have stressed the pin output driver PFET, and cooked it. One of the symptoms is an increase in Rds ON value (the FET ON resistance).

    Another giveaway is the nonlinear RdsOn value under 25mA. If a FET is operated well within its safe limits (0mA-25mA) the Rds On should be quite linear. The big blowout in Rds ON occurs when the FET silicon is cooked and overheating, which should not happen under 25mA as 25mA is well within the safe operating area of the FET silicon.
     
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