Hi all,

I am trying to knock together a 'knight-rider' display using software PWM of 9 L.E.D.s using outputs from a PIC16F676 (all outputs have a 680 ohm resister on them in series with L.E.D.).

I am just using MPLAB to software simulate and programming using an Embedinc programmer (ISCP connection).

The .asm code works perfectly when I software simulate it on a PC. Ports RA4 and RA5 are enabled appropriately.

In practice the circuit works great but outputs RA4 and RA5 don't do anything (i.e. stay at ground potential). I have the IC set to use the internal clock and to not output the clock (which would come out on RA4 or RA5 I believe). Even if I hard code a port RA4 and RA5 enable in the code ... still no joy so I guess it's something to do with the shared nature of the outputs (perhaps ??)

The comparator is turned off, all port A as digital outputs (ANSEL and TRISA both cleared) - obviously I don't use RA3.

Any suggestions what I could be doing wrong?? My configuration code is in the box below...

Any help would be appreciated!! (From a complete newbie!!)

Thanks

Rob

        ORG    0
        GOTO    RESET
        
        ORG    4
INTERRUPT

  ....

RESET
        CLRWDT
        BSF     STATUS,RP0         ; Bank 1
        CLRF    WPUA
        CLRF    IOCA
        MOVLW     B'10000111'
        MOVWF     OPTION_REG
        MOVLW    B'00010000'
        MOVWF    ADCON1
        MOVLW    B'00000000'
        MOVWF    ANSEL
        MOVLW    B'00000000'
        MOVWF    TRISA
        MOVLW    B'00000000'
        MOVWF    TRISC
        BSF        PIE1,TMR1IE
        BCF     STATUS,RP0        ; Bank 0
        BCF        ADCON0,ADON
        CLRF    PORTA_0002
        CLRF    PORTC_0002
        CLRF    PORTA_001
        CLRF    PORTC_001
        CLRF    PORTA_005
        CLRF    PORTC_005
        CLRF    PORTA_025
        CLRF    PORTC_025
        CLRF    PORTA_100
        CLRF    PORTC_100
        CLRF    BIT_MASK+0
        CLRF    BIT_MASK+1
        CLRF    BIT_MASK+2
        BSF        BIT_MASK+1,0
        CLRF    CONTROL_FLAG
        BSF        CONTROL_FLAG,0
        CLRF    DELAY_TIMER
        INCF    DELAY_TIMER
        MOVLW    B'00000111'
        MOVWF    CMCON
        ; Setup timer 1 and start
        CLRF    TMR1L
        CLRF    TMR1H
        MOVLW    B'00111001'
        MOVWF    T1CON
        CLRF    INTCON
        BSF        INTCON,PEIE
        BSF        INTCON,GIE
        CALL    INTERRUPT
MAIN_LOOP

....

 

Looks like you are setting T1OSCEN which automagically sets the TRISA4 & TRISA5 and clears RA4 & RA5.

 

Hi

Thanks I still don't really understand what that bit does ... hence why I didn't spot my deliberate mistake!!


I'll have a go with it cleared today!!


Thanks again

Rob

 

It turns on the LP Oscillator and clocks T1 with it when you are using the internal oscillator as the system clock. It'll work during sleep also so you can use it as low power counter/timer to wake up from.

 

Wicked!! problem solved... Thanks for all your help!!

Bob Wya

PS Does LP Oscillator mean Low Power oscillator (just for sleep state)?? Sorry since I am doing all mains power projects I haven't really needed to look into any power saving info!!

 

Yes it it is the low power oscillator. It is not just for sleep state but can be the system clock also. It is designed to run during sleep states so you can keep a running counter. Often in low power apps you just need to periodically wake up and do some function (quickly) and then go back to sleep.