Alright. Here's my updated schematic. I changed my approach slightly. Now, I'm counting the number of *gaps* between input pulses that are longer than the minimum, which indicates a successful read.
There's still a cap to remove the dc bias and a buffer. Afterwards, a comparator sends a high pulse every time the carrier signal exceeds a ref voltage. Because the width of this pulse could vary (ie if the amplitude of the sine wave changed), so this output is sent to a 555 timer, which outputs a fixed width pulse. This output is then fed to a missed pulse indicator. When a pulse is missed, the output goes low, causing a high output form the comparator. The resistor and cap result in a time delay, accounting for the fixed minimum distance of the gaps between carrier pulses. If the pulse exceeds the time delay, the counter increments.
As before, an integrator looks for the negative input pulse. Once received, a high pulse tells the bit hold register to store the counter value. A time delayed signal then tells the counter to reset. Finally, the arduino receives output from the bit hold register.
How's this schematic look? One question - for the tank circuit associated with the missing pulse detector, how close must the carrier frequency be to the resonant frequency for proper operation? (Will it be ok if the carrier is off by 1-2 kHz?)
There's still a cap to remove the dc bias and a buffer. Afterwards, a comparator sends a high pulse every time the carrier signal exceeds a ref voltage. Because the width of this pulse could vary (ie if the amplitude of the sine wave changed), so this output is sent to a 555 timer, which outputs a fixed width pulse. This output is then fed to a missed pulse indicator. When a pulse is missed, the output goes low, causing a high output form the comparator. The resistor and cap result in a time delay, accounting for the fixed minimum distance of the gaps between carrier pulses. If the pulse exceeds the time delay, the counter increments.
As before, an integrator looks for the negative input pulse. Once received, a high pulse tells the bit hold register to store the counter value. A time delayed signal then tells the counter to reset. Finally, the arduino receives output from the bit hold register.
How's this schematic look? One question - for the tank circuit associated with the missing pulse detector, how close must the carrier frequency be to the resonant frequency for proper operation? (Will it be ok if the carrier is off by 1-2 kHz?)
