# Output Signal Swing of CE amplifier

Discussion in 'Homework Help' started by DrWatts, Mar 15, 2012.

1. ### DrWatts Thread Starter New Member

Mar 15, 2012
1
0
Hey all, I ran into a wall while trying to design a common emitter amplifier. I was wondering if someone here would be able to point me in the right direction:

Specifications:
Common Emitter BJT amplifier with an Emitter Resistance and two coupling capacitors (assumed infinite for now)
Transistor 2N2222 (assume $\beta$=100 and $v_{be}=0.7V$)
$V_{CC}=15V$
$R_{sig}=50\Omega$
$R_L=47k\Omega$
$R_C=10k\Omega$

Design Goals:
Voltage Gain of -20 V/V
Output Voltage Swing ΔV=10V peak-to-peak
Input Resistance greater than 10kΩ

Attempt at Solution:
I thought to set $V_{C}=7.5V$ to best bias the circuit. Thus $I_C=0.75mA$. This would give a transconductance of $g_m=30mS$.

Since the signal generator impedance is low:

$G_v=\frac{v_{out}}{v_{sig}} \simeq A_v=\frac{v_{out}}{v_{in}}$

The gain equation is $\frac{-(R_c||R_L)}{\frac{1}{g_m}+R_E}$. We can solve for $R_E=379\Omega$. Which makes $V_E=0.379V$, $V_B=1.079V$, and $V_C=7.5V$.

I'm using a rule of thumb and making the current through the voltage divider equal to one tenth of the emitter current. Thus $\frac{V_{CC}}{0.075mA}=200k\Omega$. Since the sum of the two resistances needs to equal $200k\Omega$ and the voltage divider has to make $V_B=1.08V$, then $R_2=14.4k\Omega$ and $R_1=186k\Omega$.

$R_{in}=\frac{R_1||R_2}{r_{\pi}+\beta R_E}=10k\Omega$

Finally, the collector current will be at a maximum when the amplifier is in saturation:

$i_{c,max}=\frac{V_{CC}-V_{BE,sat}}{R_C+R_E}=\frac{15V-0.3V}{10k+0.380k}=1.42mA$

$v_{c,min}=V_{CC}-i_{c,max}R_C=15V-(1.42mA)(10k\Omega)=0.848V$

$v_{c,max}=V_{CC}=15V$

$\Delta V=(2)(V_{CC}-V_{c,min})=2(7.5V-0.848V)=13.3Vpp$

So by my math, the output signal should be linear up to 13Vpp. However, when I simulate this in SPICE (0.5V signal at 1kHz), my output signal is clipped above at 6.5V. I am sure that there is small mistake somewhere, but I have been unable to pick it out. I can provide more detail on how I derived my equations if necessary. Any suggestions on where to go from here?

P.S.: Sorry for the poor formatting, this is my first post!

Last edited: Mar 15, 2012
2. ### Ron H AAC Fanatic!

Apr 14, 2005
7,050
657
I don't believe you included the capacitor and the 47k load resistor in your calculations.
Keep in mind that the cap always has 7.5V across it. When the transistor cuts off, you are left with a series circuit between +15V and ground consisting of 10k, 7.5V, and 47k. This means that the peak current into the load is (15-7.5)/(10k+47k). Multiply this current by the 47k load resistance, and you get the peak output voltage.