Output impedance of common source amplifier

Discussion in 'Homework Help' started by anhnha, Oct 6, 2013.

  1. anhnha

    Thread Starter Active Member

    Apr 19, 2012
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    48
    Hi,
    I have a question about calculating output impedance of common-source amplifier.
    Here is part of lecture about common-source amplifier.
    Source: http://whites.sdsmt.edu/classes/ee320/notes/320Lecture31.pdf
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    My question is about how to calculate output impedance.
    Output impedance of the circuit is defined as follows:
    Z_{out} =  \frac{ V_{out} }{ I_{out} }
    Then, why we need to use small-signal model to calculate it? I guess it is because that at the output there is only ac component, dc component is blocked by the coupling capacitor and this is why small-signal model is used here.
    And there other ways to calculate the output impedance of the circuit not using small-signal model?
     
  2. LvW

    Active Member

    Jun 13, 2013
    674
    100
    The small-signal model is nothing else than a VISUALIZATION of the voltage-current relationships internal to the transistor.
    Thus, the output impedance of the transistor is always determined by the voltage-to-current ratio at the output node - independent on the graphical or mathematical tools you are using for calculation.
     
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  3. anhnha

    Thread Starter Active Member

    Apr 19, 2012
    774
    48
    What did you mean with "internal" here? I think you meant it is the relation between voltage and current of small-signal (ac) component.
    OK, I see. You meant that small-signal model is only a tool among others to get the the voltage, current of ac component.
    In calculation of output resistance above, input voltage, Vsig is set to zero. What is the reason for it? I also read about this in two-port network but still don't understand.
     
  4. LvW

    Active Member

    Jun 13, 2013
    674
    100
    The small signal model contains some parts (active, passive) that model the physical effects which take place within the device. And these effects are modelled by "internal" voltage-current relations.


    In order to simulate the output resistance you insert a current into the output node and determine the resulting voltage. Then, Ohms law gives you the desired result.
    However, in this case the transistor must not produce an output signal caused by any input. Thus, Vsig must be set to zero.
     
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