Optocoupler design problem.

Discussion in 'Embedded Systems and Microcontrollers' started by vishal_ranavare, Apr 8, 2009.

  1. vishal_ranavare

    Thread Starter Member

    Jan 28, 2009
    11
    0
    hi guys,
    I am working on a project based on AT89C55. Here i am connecting sensors, switches to controller through optocoupler[MCT2E] & buffer[74LS244].Design attached with this thread.Plz check & suggest me on follwing problem.

    Whenever i press the PB it gives 1.8 Vdc on buffer's i/p pin instead of which it should give 0 Vdc , So that same should reflect at buffer's o/p pin.But here buffers o/p pin always give 4 Vdc. If i check this by removing buffer IC then it gives correct result. Wat could be the problem?

    I have added RC for removing key debounceing effect.
    Plz give ur valuable suggestion.........i stuck up at this point & cant go ahead.

    Thnks.
     
  2. Dan2

    Member

    Oct 16, 2008
    19
    0
    remove the "horizontal" resistor, i think thats the problem. the buffer will hav a high input impedance so that resistor is not neccissary.
     
  3. hgmjr

    Moderator

    Jan 28, 2005
    9,030
    214
    As has been recommended in the two previous replies you need to eliminate the RC network between the opto-coupler and the 74LS244. You can implement any switch debouncing needed using software.

    hgmjr
     
  4. vishal_ranavare

    Thread Starter Member

    Jan 28, 2009
    11
    0
    hi,
    thank you all for replies.
    I have already added key debounce routine in my software, but as this is an industrial project,whethe only software delay is sufficent or hardware delay is must?

    Plz suggest.
     
  5. hgmjr

    Moderator

    Jan 28, 2005
    9,030
    214
    Since you seem intent on using the "belt and suspenders" approach then I would recommend you replace your RC low pass filter with a 74LS14 inverting buffer with Schmitt-trigger input. This will give you a decent measure of hardware filtering.

    hgmjr
     
  6. vishal_ranavare

    Thread Starter Member

    Jan 28, 2009
    11
    0
    thanks for the quick reply.

    In this case if i connect 1K, 0.22uf cap. RC network then it works properly. That means this seems to be due to internal transistor bias problem. If i would continue with this hardware delay & software debounce delay[20 ms] , then as per my knowledge it should work correctly in industrial environment also.

    As i want to optimize my circuit i am avoiding to add 74LS14.

    Plz suggest your expert opinion.
    Once again thank you very much for your valuable suggestions.
     
  7. AlexR

    Well-Known Member

    Jan 16, 2008
    735
    54
    I would not worry too much about de-bouncing until you get good voltage levels out of the opto.
    I suspect that you need to drive the opto led harder to drive the transistor into saturation.
    I would change the LED current limiting resistor from its present value of 4.7K to about 1.5K-1.8K to up the drive current from its present 4mA to 2mA-15mA.
    Next I would change the opto transistor collector resistor from 10K to 1K and I would also get rid of the debounce resistor and capacitor for the time being. You can put it back after you get good logic levels out of the opto.
     
  8. eblc1388

    Senior Member

    Nov 28, 2008
    1,542
    102
    Then I would suggest you read the datasheet of LS244 and see what the max. input low voltage is. My datasheet shows that it is only 0.8V max. That is to say one must have a voltage stay below 0.8V to being a logic LOW.

    Ask yourself or do a test to find out whether the "horizontal" 10K series resistor + the optocoupler can actually pull the LS244 input voltage down to 0.8V or less to meet this requirement. If not, then you cannot use a resistor with such high resistance value.
     
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