Hello! First post here. I'm a second year electrical engineering student.

My current (hobbyist) project is a 100Msps/20MHz USB oscilloscope using an FPGA.

I have it all planned out (schematics all drawn, too) and was about to start laying it out on PCB.

Fortunately, I decided to simulate it (the analog input frontend part) before continuing on, because I realized the design won't work at all.

The problem is that the input amplifiers have a relatively low input impedance of ~1Mohm, and that doesn't play well with the 1Mohm input impedance of the probes!

So I did some research, and apparently MOST high frequency amplifiers have low input impedance. Some even in the few hundred kHz range.

Except for those with JFET input stages. They go up to about 1Gohm, and sound just right for my needs.

However, my question is, what are their disadvantages compared to "regular" op amps? Google didn't want to tell me anything... and I'm sure there are disadvantages since otherwise all op amps with be JFET already, and I want to be aware of them.

We haven't learned about amplifiers in classes yet (well, only how to use them, not their construction), so I don't actually know what that means.

Many thanks!

 

There are no big caveats. You need to be aware that, for any voltage feedback amplifier, you will encounter the gain-bandwidth product phenomenon. For example, if you use OPA659, you should get about 650MHz -3dB bandwidth at unity gain. With gain=100, you will only get 6.5MHz bandwidth. You can use cascaded amplifiers to amelioriate this effect.
Also, layout is critical.
You are undertaking a huge project, especially as a second year student.
Good luck!

 

Thanks! That's good to know. I guess they are just bloody expensive then .

The gain at this stage will most likely be just 1 or maybe 10, since it's just buffering for a programmable gain amplifier.

And I happen to be looking at the OPA659 too! Or one of the slower versions since I just need unity gain, but they don't seem to be much cheaper...

Thanks again for clarifying .

I like to take on slightly bigger projects than I can comfortably handle, to challenge myself. That means a larger proportion of my projects end up as failures, but I always learn lots. And an occasional success is endlessly satisfying.

I don't think this one is particularly difficult, just bigger in scale (about a dozen chips). I'm most worried about the analog part, since I've quite a bit (relatively speaking) of experience in digital stuff (VHDL) and I am a professional developer (since 3 weeks ago!), so the software part should be easy, too.