Hello,

Refering to the attached schematic, my purpose is to make a buffer for the TCXO. I'm using this TCXO, and AD8062 for the op amp.

A few details:

1. The op amp was at first biased using a 3V single supply.
2. The TCXO gives more or less clean 16MHz pulses ranging from 0V to 1.3V.

However, the output of the voltage follower was really distorted.
Then I've decided to bias the op amp using a dual supply voltage. Now, the output waveform was much cleaner but still not distortion free (especially on the falling edge of the signal there is an overshoot below zero).

My question are:
1. What else can I do to reduce the distortions ?
2. What should I have done to make it work using a single power supply?

Thanks for the help,
Alex

 

Have you missed using an output coupling capacitor?

Read note 9 of the TCXO data sheet at bottom of page 2 and looks at the TCXO connection diagram at page 3.

 

Thanks for the reply,

At first the op amp was biased using a single supply so I figured that an AC coupling capacitor was not necessary. Maybe now I should add it, the problem is that the circuit is already on a PCB which makes experimenting quite difficult.

 

Coupling caps across any high frequency chip is pretty much manditory. You should be able to add a 0.1µF across the power supply leads under the PCB. For what it's worth, manufacturers add these gludges all the time, and call it a new revision.

 

Also know as decoupling caps? ( a coupling cap may be a cap between two amplifier stages ) Or is my terminology off?

 

Alex,

Russ is right....A coupling cap may be used to couple 2 stages of the amplifier. A decoupling cap at the power supply pin is used to decouple or bypass the noise on the power supply signal/pin.

For any HF application, decoupling the power is the first thing you would think of......proper bypassing is very critical in such applications.Connect a 0.1uF as close to power pin as posssible

For the TCXO application, to cut down the distortion, I would also advise you to use a isolation resistance of 20ohm or 50ohm in series at the ouput. This should help if you are driving a capacitive load.
Are you driving a capacitive load ?

-Roshan Shanbhag

 

My question are:
1. What else can I do to reduce the distortions ?

overshoot is normal for high speed opamps, and almost inevitable. if you are driving a capacitive load (aka a probe or long wire), you can put a serial resistor in the output (<110ohm and I typically use 47 - 75ohm to match the transmission line characteristic impedance) to dampen it.

2. What should I have done to make it work using a single power supply?

contrary to what you have been told, if you are using the opamp as a follower, you do NOT need a decoupling cap for it to work and your original wire-up is fine.

a dc bias source is needed if you want the gain to be different from 1.0x

 

I would suggest putting a resistor in the loop to make it more stable. I think it's referred to as Rf.

 

Thank you all for the replies.

The schematic didn't show, but all my power supplies have two bypass capacitors: 100pf and 100nF.

I would suggest putting a resistor in the loop to make it more stable. I think it's referred to as Rf.

The original circuit had a resistor in the feedback loop (for some reason I thought this could help with dc offsets), but the output signal is MUCH cleaner when unity feedback is used.

Are you driving a capacitive load ?

Yes, I'm driving a capactive load: The input capacitance of an IC (the exact value of which the data sheet doesn't state) and the input capacitance of the scope is 20pF.

So, I'll try putting a resistor in series with the output.

A few more things:
1. All of the AD8062 parameters are given with a load resistence of 1-2 KΩ. Does this mean that if I have a completely different load resistance the performance will degrade ?
2. According to the head room considerations the input common voltage should only extend to within 1.8V of the positive supply (3V in my case).
If my input is 1.3V can this be an issue?


Thanks again for the help,
Alex

 

Hello again,

While searching for info, I ran across the following schematic.

[The original link]
I think this is what I should've done in the first place, but indroducing now all these changes will be difficult.

So, I have a few questions:

1. Can I omit R1,R2,C1, connect R3 (change it to 20K) to GND and add another 20K resistor from the op amp positive input to the positive power supply? Will the circuit still function properly after these changes?

2. I coudn't understand the purpose of R5.The text states that it is used to reference the signal to ground. But after blocking the DC using C6 isn't the signal already referenced to GND ?

Thanks for the help,
Alex

 

R1 & 2 forma a voltage divider to set their common point at 1/2 Vcc. C1 is a niose filter. The net effect is to make a virtual ground so the op amp can swing its output both positive and negative from that bias point. If you remove the network, your op amp will be unable to follow a signal with a negative excursion.

R3 buffers the bias supply so the signal in through C2 will be unaffected. C6 only blocks the DC offset, but R5 has to be present to reference the signal to circuit ground. Because the lower end of R5 is at ground, the signal on the top end will appear to swing above and below ground. R5's value could be larger to avoid loading the signal. 10K should be fine.

 

Hi,

Trying to understand better the circuit, I think to myself R3 is buffering the bias supply indeed but it is there mostly because of C1 because in AC analysis it should provide a AC path to ground overloading Vin without R3. We should have a high pass filter with Cin and 20k load, right? I mean, is this high pass filter a criteria for signal fidelity in the square wave?

 

Rf will limit the feedback. If you don't need to do this, then that's all right.