I'm trying to make sense of a pre-existing circuit (part of a much larger board) which multiplexes several RTDs into one pre-amplifier before feeding it into a microcontroller ADC. I did my own analysis of how I thought the signal would work the circuit and came up with a formula for what voltage the ADC should see with any given RTD resistance. I also found the formula in the firmware that calculates the displayed temperature based on ADC values. I integrated both of those into a spreadsheet and it all comes out perfectly - for any given RTD resistance, I get the proper calculated temp to within a few tenths of a degree F. The problem is that in practice, the temperature reads low. This is true with actual RTDs (which could introduce some error of their own) and also true if you plug in a resistor of known value and compare the displayed temp to what it should be (there are plenty of RTD tables for that - and yes, I've checked DIN vs. JIS - we're talking DIN here.)

My analysis was in simple blocks. The yellow area is a voltage divider between the 2k43 resistor and the RTD (2k7 reference resistor used in many of my tests, as that is closest to the target range where accuracy is most important.) The yellow area is a 1k resistor and the multiplexer, which as far as I can tell should introduce no voltage drop since there will be essentially no current drawn through it after the 0.3ms it takes to charge the decoupling caps. The green area is a voltage divider that cuts the reference voltage (2.5V) in half (1.25V) as the negative input to the op amp. Resistors R34 and R35 are set to provide gain of 16.05x, which provides the red output that feeds directly into the ADC (also referenced to save V_REF.)

I've measured V_REF, orange nodes, and the divided-V_REF in green area and they all check out perfectly. Since the yellow and red areas are multiplexed, my DMM does me no good in trying to measure voltages there.

I can't for the life of me figure out why this doesn't work perfectly. Does the op amp input draw enough current for me to be losing anywhere from 4-15mV across the yellow area's resistance? Do multiplexers do anything to the signal besides presenting the on-state resistance listed in the spec sheet? What am I missing here?

For what it's worth, we're not discussing a bad board needing repair here - the problem is systemic. It's been happening for 4+ years over hundreds of machines. The software has provisions for adjusting offsets to make it work, but curiosity and idealism make me want to understand what's really happening here, and maybe fix it.

 

Forgot data sheets. Here are links for mux and op amp:
http://www.ti.com/product/ina331
http://www.analog.com/en/products/switches-multiplexers/analog-switches-multiplexers/adg708.html

 

I've looked over your circuit carefully, read the datasheets, and scratched my head a-plenty, and I can't see anything wrong with that design. Maybe someone else will, but not me. Your instrumentation amp has very low input leakage and very low input offset voltage, and the leakage from the mux chip looks to be under 20 nA; and 20 nA drawn from an approximately 2.2K ohm source impedance only drags the input voltage down by less than 50 μV.

The only thing I can think of is, how fast is that mux chip cycling through the channels, and how long is each channel given to settle before your ADC samples it? The time constant of C30 and the source impedance feeding it (≈2.2K ohms) is 22 μs, and IMO waiting anything less than about 20X that for settling time could put you in danger of bleed-over from one channel to the next.

That's all I can think of; other than that, I'm stumped.

 

Maybe it needs a 4 wire RTD measurement circuit. A small, relatively constant offset can be due to losses due to the measurement current in the single ended sense circuit. The op-amp is not pulling any significant current in the yellow line. The leakage through the transient suppressors at .03uA should not be a problem. Doubt if the caps are either. Don't forget that many RTDs are specified with a nominal resistance at the reference temperature. While very stable, its not necessarily exactly the quoted value - adding a little offset. The firmware correctly takes the net effect of the stable errors into account with its offset calibration. That's pretty common in practice.

The only thing I can think of is, how fast is that mux chip cycling through the channels, and how long is each channel given to settle before your ADC samples it? The time constant of C30 and the source impedance feeding it (≈2.2K ohms) is 22 μs, and IMO waiting anything less than about 20X that for settling time could put you in danger of bleed-over from one channel to the next.

OBW beat me to it but I'd look there too.

 

Maybe it needs a 4 wire RTD measurement circuit. A small, relatively constant offset can be due to losses due to the measurement current in the single ended sense circuit.

That was my first thought, too, but then I noticed he said the temperature always reads too low in this rig. The errors from a 2-wire RTD connection will always raise the apparent temperature because of the added wiring resistance, so I set that idea aside.

Diagnostic idea: try removing C30 and see if that makes a difference; that would be a quick test of the settling time hypothesis...

 

Maybe it needs a 4 wire RTD measurement circuit. A small, relatively constant offset can be due to losses due to the measurement current in the single ended sense circuit. The op-amp is not pulling any significant current in the yellow line. The leakage through the transient suppressors at .03uA should not be a problem. Doubt if the caps are either.OBW beat me to it but I'd look there too.

I'm pretty sure that the 4 wire vs 2 wire RTD thing isn't causing this particular problem. I've tried plugging a 2k7 resistor directly into the input at the PCB and measuring the voltage at the resistor, and I get the expected voltage there, but I still get bad numbers from the ADC.

If I understand this right, the 4 wire setup would eliminate inaccuracies due to additional wire resistance to and from the RTD, right? Higher resistance would provide artificially high temperature values, and we're getting the opposite, by about 4.5°F.

 

Oops, beat me to it!

 

I've looked over your circuit carefully, read the datasheets, and scratched my head a-plenty, and I can't see anything wrong with that design. Maybe someone else will, but not me. Your instrumentation amp has very low input leakage and very low input offset voltage, and the leakage from the mux chip looks to be under 20 nA; and 20 nA drawn from an approximately 2.2K ohm source impedance only drags the input voltage down by less than 50 μV.

The only thing I can think of is, how fast is that mux chip cycling through the channels, and how long is each channel given to settle before your ADC samples it? The time constant of C30 and the source impedance feeding it (≈2.2K ohms) is 22 μs, and IMO waiting anything less than about 20X that for settling time could put you in danger of bleed-over from one channel to the next.

That's all I can think of; other than that, I'm stumped.

I had wondered about switching times and cap charging too. I tried running an LTspice sim of the two voltage dividers and the 3 cap filtering network. It looked to me like it settled to within less than 1mV of stable between 300-400us after switching. I looked at the code, or tried to; it's not my strong suit. It looks like there's a 1ms delay between mux switching and ADC sample request, which I assumed was good from my first look. From what you say though, it sounds like closer to 4 or 5ms would be safer. Food for thought...

 

Oh, yeah. Thank you both for checking this out. I appreciate the help!

 

I'm pretty sure that the 4 wire vs 2 wire RTD thing isn't causing this particular problem. I've tried plugging a 2k7 resistor directly into the input at the PCB and measuring the voltage at the resistor, and I get the expected voltage there, but I still get bad numbers from the ADC.

OK, didn't know that. If the MUX settling turn out not to be the problem, I'd look at the ADC Vref +/- vs the RTD source and ground. In a perfect world, they would be connected together so that they track with no offsets due to slightly different ground voltages etc.

Good luck.

 

OK, didn't know that. If the MUX settling turn out not to be the problem, I'd look at the ADC Vref +/- vs the RTD source and ground. In a perfect world, they would be connected together so that they track with no offsets due to slightly different ground voltages etc.

Good luck.

Good call. I had noticed earlier, but then forgotten, that V_REF is provided by an op amp set up as a voltage follower from the uc's internal reference voltage (which is also the ADC ref.) So any imperfection in the voltage follower would appear as measurement error. I'll compare uc ref voltage vs V_REF soon, hopefully tomorrow morning.

The grounds all go to the same ground plane in relatively close proximity, so I'd expect (hope for) them to be good.

 

There is one other of thing I noticed in this circuit. There's an extra voltage divider (R32 & R72) feeding into input 7 on the mux, as well as a ground connection feeding input 8 on the mux. I can't think of any reason for either of these, unless they're there to allow for self calibration of the ADC system. I've not yet found any such provision in the code, but this code is long, deep, and way over my head, so it could just be hiding from me. If it's there, I've not yet had a chance to check the math there, and perhaps that would explain the problem.

 

There is one other of thing I noticed in this circuit. There's an extra voltage divider (R32 & R72) feeding into input 7 on the mux, as well as a ground connection feeding input 8 on the mux. I can't think of any reason for either of these, unless they're there to allow for self calibration of the ADC system. I've not yet found any such provision in the code, but this code is long, deep, and way over my head, so it could just be hiding from me. If it's there, I've not yet had a chance to check the math there, and perhaps that would explain the problem.

You sometimes have a shorted input to quickly discharge the input cap sample/hold of the ADC to get to a known state before a sample.

 

You sometimes have shorted input to quickly discharge the input cap sample/hold of the ADC to get to a known state before a sample.

Oh, that totally makes sense. Thanks!

I'm still going to keep poking around in the code for my own curiosity and general enlightenment, but it's good to know that there's a logical explanation for that bit of circuitry beyond my self calibration theory.

 

It looks like there's a 1ms delay between mux switching and ADC sample request, which I assumed was good from my first look. From what you say though, it sounds like closer to 4 or 5ms would be safer. Food for thought...

20 * 22 μs = 440 μs, so 1 ms should be more than adequate.

After sleeping on this, I woke up still befuddled. Maybe I'll have some more ideas after a couple more cups of coffee...

 

20 * 22 μs = 440 μs, so 1 ms should be more than adequate.

After sleeping on this, I woke up still befuddled. Maybe I'll have some more ideas after a couple more cups of coffee...

Oh, boy. Don't know how I managed to by off by a factor of 10 on simple multiplication. Maybe I'm not getting enough sleep! Thanks for catching my goof.

 

Ok, so here's my plan for today:
1) check uc voltage ref vs V_REF from op amp.
2) double check that I read code correctly regarding 1ms pause between mux and adc.
3) double check BOM (again) for discrepancies between schematic and actual parts used. We've found undocumented substitutions on these boards before, but I'm almost certain there are none relevant to this circuit.
4) dig deeper into code and look for anything besides the one formula I found which might be modifying the ADC value.

I'll report back with my findings.

 

OK. Now working on Cup #4, brain is beginning to function. A couple of random neurons have lit up:

1. Going over your circuit again, I can't see anything that could possibly cause your ADC to be reading 4-15 mV low; the circuit design looks solid.
2. What microcontroller chip are you using? I'd like to look up its datasheet and give it a look-see.
3. Something JohnInTx wrote last night in post #10 set off several other neurons:

   If the MUX settling turn out not to be the problem, I'd look at the ADC Vref +/- vs the RTD source and ground. In a perfect world, they would be connected together so that they track with no offsets due to slightly different ground voltages etc.

   He may have something here: circuit board/system ground is NOT the same as ground inside your μC chip, and it is probably the latter to which your on-chip Vref is referenced, not the former. There could be dozens of millivolts offset between board ground and internal chip ground, due to the chip's bonding wire resistance and the resistance of the ground path on the chip metallization. The μC's own current drain, and any current being sunk by any of the μC's output pins, will cause voltage drops across that resistance.
4. I'd REALLY like to set eyes on that datasheet.
5. Also, if you can provide any details on how the software is configuring the ADC and the voltage reference.
6. I'm very familiar with Microchip's PIC chips (mostly the dsPIC30F and dsPIC33EP series), but any other mfgrs' chips will require some study and some head-scratching.

All for now. If anything else comes to mind, I'll post it.

 

OK. Now working on Cup #4, brain is beginning to function. A couple of random neurons have lit up:

1. Going over your circuit again, I can't see anything that could possibly cause your ADC to be reading 4-15 mV low; the circuit design looks solid.
2. What microcontroller chip are you using? I'd like to look up its datasheet and give it a look-see.
3. Something JohnInTx wrote last night in post #10 set off several other neurons:He may have something here: circuit board/system ground is NOT the same as ground inside your μC chip, and it is probably the latter to which your on-chip Vref is referenced, not the former. There could be dozens of millivolts offset between board ground and internal chip ground, due to the chip's bonding wire resistance and the resistance of the ground path on the chip metallization. The μC's own current drain, and any current being sunk by any of the μC's output pins, will cause voltage drops across that resistance.
4. I'd REALLY like to set eyes on that datasheet.
5. Also, if you can provide any details on how the software is configuring the ADC and the voltage reference.
6. I'm very familiar with Microchip's PIC chips (mostly the dsPIC30F and dsPIC33EP series), but any other mfgrs' chips will require some study and some head-scratching.

All for now. If anything else comes to mind, I'll post it.

Microcontroller is TI MSP430F2416TPN.

Thank you for explaining the distinction between grounds regarding JohnInTx's comment. I should've known better than to assume the ground part was ok. If there's one thing I've learned in electronics, it's that grounding is NEVER as simple as it seems! I can't wait to hear more on this issue - it's fascinating! If there was a significant offset there, I wonder if it would be consistent enough to be something that could be accounted for in the code. I'm guessing yes, since the error in the final output appears to be pretty steady.

I did check the V_REF op amp this morning and it's spot-on (reference voltage from MSP430 and V_REF from op amp output are identical, at least to 1 mV accuracy which is the best I can measure.) Although I don't think this should matter, the reference voltage on the specific board I'm doing most of my experiments with is 2.516V, not my stated 2.5V. Given that the ADC and the whole rest of the circuit references the same 2.516, I don't think that matters, but I thought I'd mention it in case I'm missing something.

I'll see what I can do on parsing the ADC code. Might take me a while to find the relevant parts. We're working with a programmer right now on some other changes anyway, so hopefully I can get a little help on that end.

Finally, I've got a batch of 0.1% accuracy resistors in 5 values spanning the range this circuit is meant to read. I plan to read the displayed temperature for each resistance value and calculate backwards to what voltage the ADC thinks it's seeing, then compare that to the actual voltage we're getting from the reference resistor voltage divider circuit. My hope is that the nature of the problem will become more clear once I see whether the errors are linear, exponential, etc.

 

Yeah, grounding is one of those things that seem simple on the surface, but the Devil is in the details and they can be VERY devilish!

Once I can get myself around some food, I'll take a look at that MSP430 datasheet...