On the 8051, what is a quasi-bi-directional port?

Discussion in 'Embedded Systems and Microcontrollers' started by Papabravo, Oct 20, 2014.

  1. Papabravo

    Thread Starter Expert

    Feb 24, 2006
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    The following question arrived in my inbox, and I believe that questions should be asked and answered in the open forum.

    I have thought long and hard about this but i just can't crack it.

    To me Quasi means, like the real thing but not quite. So when they say PORT 1,2 and 3 on the 8051 are quasi bidirectional i don't get it.

    Is it because these ports have an internal pull up resistors that makes them unable to source significant current as opposed to port 0 that uses an external pull up connected to Vcc that can source significant current? I am a total beginner to microcontrollers. Are the I/O ports on other micro controllers different?

    Has the high impedance state of the port 0 pin on reset have something to do with it?

    Please help, it's driving me crazy. I just can't move on without understanding this.


    It is an excellent question and I'll try to provide an answer.
    A true bi-directional port has an output register with two states, 0 and 1. It also has a data direction register with two states, input and output. In the 8051 port architecture there are no data direction registers, so the behavior of a port pin must accommodate two output states and one input state. It does this by combining the output high state and the input state. The output high state is actually implemented with a high value active pullup of around 40K ohms. It can source only small amounts of current, and a strong external driver can pull it low with very little effort and no damage to the pin. The output low state is like any normal pin in that it can sink a reasonable amount of current, a few milliamps.

    Port 0 on the 8051 is different in that the outputs are open-drain. This means that to go high they require an external pullup. Writing a 1 to the port latch allow them to be used as inputs, just like the other ports.

    I hope this answers the question, but others may have additional points.
     
  2. Dhaya777

    New Member

    Oct 20, 2014
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    Forgive my ignorance...please correct me if my understanding is wrong

    PORT 1,2 & 3 are QUASI because when in output high or input mode the internal workings are the same. i.e an internal pull up is used to output a high reading on the pin. Furthermore to input an 0 on the pin the external device has to sink current or else the pin just reads high.

    PORT 0 on the other hand were it to be used as an input needs no external pull ups but has to have a 1 written to the register, so that the pin is at a high impedance state and an external device can send a high or low signal directly to the read pin buffer connected to the pin. But to be used as a output port an external pull up is necessary to send out an output high signal.

    Also the status of the SFR's of the PORTs won't tell you anything about whether the ports are outputs or inputs, you can only find this out by seeing what is connected to the pins, yes? That is what you meant by they don't have a data direction register, yes?

    Port 0 fulfils your criteria of having an "output register with two states 0 and 1" just by having an external pull up because that means that pin is an output pin and anything in its SFR is an output 0 or 1, am i getting it right?

    Your explanation set me thinking and reading and brought me this far, even if i got it wrong, thank you for making me think.












     
  3. Papabravo

    Thread Starter Expert

    Feb 24, 2006
    10,178
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    I think you have it pretty well nailed down. The input impedance of a port pin is around 40K Ohms. This is lower that what I would call high impedance, but high enough to do what the designers intended which is to be a bidirectional port without the addition of a data direction register. When the 8051 was introduced, in the 1978 time frame, the silicon required for SFRs was precious and that partially explains why they worked so hard at eliminating those data direction registers that were popular in the Motorola and MOS Technology processors.
     
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