Hi there,
I have a question please about getting an octal latch to grab inputs correctly.
I've attached a screenshot of the area of the schematic concerned. Please bare in mind the following -
- None of the cap or resistor values have been calculated yet, I'm just getting the rough design in place before I sort that.
- The schmitt/OR circuitry driving the LE inputs and the schmitts driving the upper latch inputs are all triggered from one push switch, so can be assumed to go high and low at the same time.
I assumed that I'd be able to find an Octal latch with an LE input that grabs data on the positive transition of the LE input, so I added R58/C25 to slow down the LE positive transition to ensure the latch inputs were high before the time the LE input went high.
However, all of the latches I can find (currently looking at the 74ls373) seem to take the inputs on the LE input negative transition.
So my question is, do you think the latch will still grab the inputs correctly with the clock and inputs both going low together? Should I try and slow down the inputs going low?
Any help for a newbie would be much appreciated.
https://dl.dropboxusercontent.com/u/13439305/Screen Shot 2013-09-29 at 18.22.32.png
Thanks,
Simon
I have a question please about getting an octal latch to grab inputs correctly.
I've attached a screenshot of the area of the schematic concerned. Please bare in mind the following -
- None of the cap or resistor values have been calculated yet, I'm just getting the rough design in place before I sort that.
- The schmitt/OR circuitry driving the LE inputs and the schmitts driving the upper latch inputs are all triggered from one push switch, so can be assumed to go high and low at the same time.
I assumed that I'd be able to find an Octal latch with an LE input that grabs data on the positive transition of the LE input, so I added R58/C25 to slow down the LE positive transition to ensure the latch inputs were high before the time the LE input went high.
However, all of the latches I can find (currently looking at the 74ls373) seem to take the inputs on the LE input negative transition.
So my question is, do you think the latch will still grab the inputs correctly with the clock and inputs both going low together? Should I try and slow down the inputs going low?
Any help for a newbie would be much appreciated.
https://dl.dropboxusercontent.com/u/13439305/Screen Shot 2013-09-29 at 18.22.32.png
Thanks,
Simon
