Next Report - Application circuits for MOSFETs

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PsySc0rpi0n

Joined Mar 4, 2014
1,755
Ahh ok. I didn't understood A' and B' like the NOT of A and B!


Edited;

I'm trying to simulate the circuit in an app at my smartphone and I need some help with some MOSFETs params setup.

What values should I setup for the following params of P and N MOSFETs???

For the upper MOSFETs, the defaults are:

With - 1μm
Lenth - 200n
KP - 118μA/V^2
VTO - 430mV
Lambda - 60 m 1/V


For the lower MOSFETs, the defaults are:

With - 3μm
Lenth - 200n
KP - -30μA/V^2
VTO - -400mV
Lambda - 110 m 1/V

Can you help me with these values? Do you have an idea how can I change them to simulate the circuit?
 
Last edited:

ericgibbs

Joined Jan 29, 2010
18,766

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Last edited:

ericgibbs

Joined Jan 29, 2010
18,766
Ok, big thanks Mr EricGibbs!!!

I would love to have a tenth of your knowledge about Electronics to go to exam in June! :)
hi Psy,
When you are a few weeks away from your 82nd birthday, I am sure you will have.:)

Post your PWM version simulation of the H bridge, make one the voltage sources equal to 0V. To show it reversing you could use a switch over from 'A' to 'B' inputs.

Eric
 

Thread Starter

PsySc0rpi0n

Joined Mar 4, 2014
1,755
I would love to reach your 'st'age!!! I pay my true respects to someone like you who makes really good use of the modern technologies such as internet to help others...

It's not common to see someone so experienced using internet in a daily basis ad so well as you do...

I hope I can reach 82 and that you can see it!!!
 

Thread Starter

PsySc0rpi0n

Joined Mar 4, 2014
1,755
Morning...

I'm back here because there is something I can't understand in the tests we made at the Lab.

We have tested the attached circuit in the breadboard to analyse the timer circuit but I just can't understand the output plot...

The capacitor charges when the pulse goes up (we made sure that the capacitor charges up to 100% with 55ms) and then the SW opens making the capacitor to feed the load. When the Voltage at the capacitor drops below Vt, the Id comes to zero. This was what LTSpice simulation shows but at the lab, the Id curve is ust the other way around... I can't understand why!

Can you help?

The attached printscreens shows 2 different capacitors, one of 10μF and the other is 20μF.
 

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ericgibbs

Joined Jan 29, 2010
18,766
hi,
In the lab, what method did you use to measure the Id current.??

Was it a 'current probe' or a 'series' test resistor.?

E
 

Thread Starter

PsySc0rpi0n

Joined Mar 4, 2014
1,755
hi,
In the lab, what method did you use to measure the Id current.??

Was it a 'current probe' or a 'series' test resistor.?

E
I'm sorry I can't (don't know how to) answer that question...

We always use the same probes which has the x1 and x10 selector and we were said that the OCR can't measure currents. So, what those screens shows are voltages at the capacitor and DS junction!
 

ericgibbs

Joined Jan 29, 2010
18,766
I
We always use the same probes which has the x1 and x10 selector and we were said that the OCR can't measure currents. So, what those screens shows are voltages at the capacitor and DS junction!
If you measure the Drain voltage rather than the Drain current, the waveform will be in the opposite sense.
As Id decreases, Vd will increase.:rolleyes:

E
 
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