newbie JFET query - what use in single supply?

Thread Starter

philbowles2012

Joined Mar 28, 2013
42
So I have done a lot of reading about jfets, but it has confused me more. Considering n channel all the literature says that the gate voltage needs to be negative to control Ids.

I get that with Vgs at zero, the channel is open and Ids is at max. Im now thinking of a single 0 to 5v circuit. When we say negative, do we mean with respect to Vdd or 0v? This point is crucial to my understanding!

I can see how the former would be useful, I.e. bringing to gate to some value between 0 and 5v would control Ids. So at say 2v which is 3v negatjve w.r.t. Vdd of 5v, a smaller current flows. If I have to take this to (in my mind) a real negative voltage of -2.5v ie 7.5v below Vdd it seems like a have to have a split supply and I cant see much use for the n channel device in single supplies.

I cant get my head around this. Should I be thinking of p channel devices? What would the value of Ids be if I just leave thegate floating? What would happen if I tied gate to Vdd ?

I have bought a handful of j113 for £1.50 to play with and understand properly, but I dont want to start a fire or waste my time with a circuit that will never work because its wired wrongly!

There seem to much fewer circuits thna for bjt or mosfet and jfet seem harder to find, is this beacuse they have few specific uses or are they becoming obsolete? Is thre some killer task that only a jfet will work for, or can they always be replaced with mosfet?

I think I generally "get" bjt and mosfet, and I have designed and built successful circuits with both pnp/npn bjts and p and n mosfets, but for some reason I just cant "see" a practical/useful circuit in a single supply situation with jfets. The circuits I have seen appear to use n jfets without split supplies, so I just dont understand how they work.

Help!
 

ericgibbs

Joined Jan 29, 2010
18,766
hi phil,
The j113 FET is a N Type Depletion FET, which means the -Vgs has to be increasing Negative, this will reduce the Drain current.
You can get N Type Enhancement FET, where an increasing -Vgs will increase the Drain current.
 

Jony130

Joined Feb 17, 2009
5,487
Between JFET gate and JFET body pn junction exist. But in JFET we want Ig = 0A.
So we must reverse bias this diode. And this is why Vg voltage cannot be large then source (body) voltage.


For N JFET when Vgs = 0V N-JFET is full ON and Idss current is flowing.
To turn off the N-JFET we need to lower the gate voltage below source voltage. So if source is connect to 0V we need negative voltage at gate to turn off the transistor. For example if Vgs(off) = -3V we need -3V at gate to compliantly turn off the JFET.
But if we connect source to 5V, drain to 10V.
JFET will start to conduct if gate voltage is large then 2V. And will be full ON when Vg reach 5V.
 

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k7elp60

Joined Nov 4, 2008
562
Using Jfets on a single supply is quite easy. If you put a resistor from the source to ground, parallel it with a bypass capacitor. Put a resistor to ground. The drain current will cause the source to be + above ground and
the gate being connected to ground will automatically be -. That is with a + supply and N channel Jfet.
 

Thread Starter

philbowles2012

Joined Mar 28, 2013
42
Between JFET gate and JFET body pn junction exist. But in JFET we want Ig = 0A.
So we must reverse bias this diode. And this is why Vg voltage cannot be large then source (body) voltage.


For N JFET when Vgs = 0V N-JFET is full ON and Idss current is flowing.
To turn off the N-JFET we need to lower the gate voltage below source voltage. So if source is connect to 0V we need negative voltage at gate to turn off the transistor. For example if Vgs(off) = -3V we need -3V at gate to compliantly turn off the JFET.
But if we connect source to 5V, drain to 10V.
JFET will start to conduct if gate voltage is large then 2V. And will be full ON when Vg reach 5V.
got it, so the gate voltage really does have to be "really" negative, i.e. below source voltage?

i
 

Thread Starter

philbowles2012

Joined Mar 28, 2013
42
Using Jfets on a single supply is quite easy. If you put a resistor from the source to ground, parallel it with a bypass capacitor. Put a resistor to ground. The drain current will cause the source to be + above ground and
the gate being connected to ground will automatically be -. That is with a + supply and N channel Jfet.
ok, so as long a resistor from source to gnd is big enough to get source voltage more above gnd than Vp (with Vg=0) then Ids will start to reduce ?
 

Thread Starter

philbowles2012

Joined Mar 28, 2013
42
hi phil,
The j113 FET is a N Type Depletion FET, which means the -Vgs has to be increasing Negative, this will reduce the Drain current.
You can get N Type Enhancement FET, where an increasing -Vgs will increase the Drain current.
I think perhaps when I say MOSFET (e.g. the 2n7000 i usually play with) I am fogetting the "enhancement" part. Maybe its "depletion" thing thats confusing me, not JEFTs per se...would a depletion MOSFET work (or confuse me equally!) in a similar way to the J113?
 

Jony130

Joined Feb 17, 2009
5,487
got it, so the gate voltage really does have to be "really" negative, i.e. below source voltage?
i
Yup
ok, so as long a resistor from source to gnd is big enough to get source voltage more above gnd than Vp (with Vg=0) then Ids will start to reduce ?
Yes, see the example

Thanks to Rs resistor and Id current, the voltage at source is larger then 0V. But the gate is pulled down to gnd via Rg resistor. So the voltage at source is positive and voltage at gate is 0V and this means that Vgs is negative. Vgs = Vg - Vs = 0V - Vs= -Vs.
 

Thread Starter

philbowles2012

Joined Mar 28, 2013
42
You boys are wonderful. And Fast! I think Im starting to get it.

So now to the $64000 part - to keep the beast in the ohmic region, I have to make Vgs go sufficiently negative to get just below below Vp? (or as in Jony example where gate is pulled to 0...get the voltage at source to be just above Vp?)

So if I read the datasheet in more detail, I should be able to find a value for the source resistor which (when Vdd = +5v) will bias the 113 into that region?

PS I understand about the non-linearity and the trick of feeding back Vdd/2 to the gate to make it more linear...I also chose the 113 because it has the highest RDs(on) which - unless my brain is totally fried - means a wider range of resistance in the ohmic region if I want to try to make a homebrew voltage-controlled resistor?
 

Thread Starter

philbowles2012

Joined Mar 28, 2013
42

Thread Starter

philbowles2012

Joined Mar 28, 2013
42
Yes, I saw those - to my mind anything in a tin case has to be obsolete and they are like ehns teeth to find a supplier. The j311 was a lot easier to find (ebay) and cheap as chips. That way I dont get upset if (when!) I let out the blue smoke.

Being a beginner, when I find a part that I think I need and it is in a can, It is usually a sign that a) I have missed something b) there is almost certainly a modern part that will do everything I'm trying to do and more for 5c

Im at the stage of my education where I know enough to be dangerous but not yet enough to always work things out by myself. If a part exists in my Android tablet simulator (EveryCircuit) I can usually knock up something thats worth soldering and stands a chance of working...if a part ain't there (as in this case) then im pretty much back on the nursery slopes!

Its a great way to learn though, and I couldnt do it without you guys, so thanks again
 

#12

Joined Nov 30, 2010
18,224
Here, I can do the hillbilly version. :D

A jfet is a three legged animal that is born in the "on" condition. With it's voltage gate to source at zero, it is ready to conduct as much as it can, and that is called Idss. You can't amplify anything with the transistor slam-on all the time, so you have to diminish the current flow at idle. You do that the same way you do a vacuum tube, add a cathode...wait...source resistor so the natural current flow causes a voltage across a resistor, and that developed source resistor voltage is more positive than the gate/grid which is tied to "ground" with a high resistance.

Now that you have used the natural current through the device to slow down its own flow, you can connect a signal to the gate and the jfet has some more and some less current to allow, and that is called amplification.:p
 

ian field

Joined Oct 27, 2012
6,536
I think perhaps when I say MOSFET (e.g. the 2n7000 i usually play with) I am fogetting the "enhancement" part. Maybe its "depletion" thing thats confusing me, not JEFTs per se...would a depletion MOSFET work (or confuse me equally!) in a similar way to the J113?
A JFET is pretty much the same as a triode valve.

The usual thing is to include a source/cathode resistor so that it self-biases, usually you'd put a capacitor across that resistor so that you get some AC gain - the resistor gives you lots of nfb, if you short out the AC nfb (with the capacitor) you're left with the DC nfb which stabilises your operating point.

MOSFETs can be more tricky to bias for linear operation - I usually include a source resistor to drop 0.7V at the desired drain current and drive a BJT with it to stabilise the bias voltage, once again; you have to include a capacitor in this nfb loop to preserve AC gain.

Once you've arranged to stabilise the bias, you can "bootstrap" the gate (put a high value resistor between gate and bias network) - you'll never get back to the MOSFET's high input resistance because of the bootstrap resistor, but you can get a fair bit more gain than with a JFET.
 
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