I also posted this on Microchip's forum, but I wanted to see what response I'd get here:
I've got a PIC16F1934 that I'm planning to use to communicate with an MRF49XA radio transceiver using the built in SPI.
Data sheet links:
PIC16F1934
http://ww1.microchip.com/downloads/en/DeviceDoc/41364D.pdf
MRF49XA
http://ww1.microchip.com/downloads/en/DeviceDoc/70590b.pdf
From the 16F1934 datasheet, it appears that data written to the SSPBUF register is mirrored in the SSPSREG (shift register) register and then clocked into the MRF49XA upon selecting it and enabling the SPI by setting the SSPEN bit of the SSPCON1 register. The datasheet says that an interrupt flag, SSPIF, and Buffer Full bit are both set in the SSPSTAT register when 8 bytes are received. So, I'd imagine I'd just test for this flag, read any data in the SSPBUF register into a user register, and then rewrite it with the next byte I need to transmit. Is this correct? Will writing a new byte ti the SSPBUF require me to disable the SPI and re-enable it. Would this disrupt the clock cycles that the save is expecting?
Here's how I'm envisioning the code if some1 can confirm my thinking please:
Is the above more or less correct code?
Should I expect the MRF49XA (slave) to always be shifting something into the PIC's SDI whenever I'm clocking data out of the SDO?
Thanks for the help.
I've got a PIC16F1934 that I'm planning to use to communicate with an MRF49XA radio transceiver using the built in SPI.
Data sheet links:
PIC16F1934
http://ww1.microchip.com/downloads/en/DeviceDoc/41364D.pdf
MRF49XA
http://ww1.microchip.com/downloads/en/DeviceDoc/70590b.pdf
From the 16F1934 datasheet, it appears that data written to the SSPBUF register is mirrored in the SSPSREG (shift register) register and then clocked into the MRF49XA upon selecting it and enabling the SPI by setting the SSPEN bit of the SSPCON1 register. The datasheet says that an interrupt flag, SSPIF, and Buffer Full bit are both set in the SSPSTAT register when 8 bytes are received. So, I'd imagine I'd just test for this flag, read any data in the SSPBUF register into a user register, and then rewrite it with the next byte I need to transmit. Is this correct? Will writing a new byte ti the SSPBUF require me to disable the SPI and re-enable it. Would this disrupt the clock cycles that the save is expecting?
Here's how I'm envisioning the code if some1 can confirm my thinking please:
Rich (BB code):
;;;code to transmit a 10101010 and then a 11111111 byte over SPI
MOVLW b'10101010
MOVWF SSPBUF
BSF PORTB,0 ;select the slave
BSF SSPCON1,SSPEN ; enable the SPI
waitloop
BTFSS SSPSTAT,BF ; test the bit full bit to see if 8 bytes have been clocked in
GOTO waitloop
MOVF SSPBUF,w ;move SSPBUF register into W
MOVWF RECVD1 ; move what was in the SSPBUF into user file RECVD1
MOVLW b'11111111
MOVWF SSPBUF ;load above literal into SSPBUF
waitloop2
BTFSS SSPSTAT,BF ;test the bit full bit to see if 8 bits have been clocked in
GOTO waitloop2 ; dont proceed if 8 bits have bit been clocked in
MOVF SSPBUF,w
MOVWF RECVD1 ;move what was just in SSPBUF into user file RECVD1
.
.
.
end
Should I expect the MRF49XA (slave) to always be shifting something into the PIC's SDI whenever I'm clocking data out of the SDO?
Thanks for the help.