Need to reduce current in saturation

Discussion in 'General Electronics Chat' started by dtloach, Mar 24, 2013.

  1. dtloach

    Thread Starter New Member

    Mar 24, 2013

    I am building a battery powered regulator (linear) type device that needs to last many years on battery power, and so current draw is critical. It is expected to operate at DC only (<<1Hz).

    I am using a TLV2244 quad amp, which is supposed to draw 1uA per channel. I have found that this amp actually draws about 4uA when the output is saturated at the negative rail, and about 7uA when saturated at the positive rail.

    The final stage of my circuit is a G:300 inverting configuration with the + input tied to a 1V reference. The output drives a FET gate. The input to this stage may vary from about 400mV to about 1200mV. It needs to be in a linear region when the input is very near 1V, hence the large amplification. I cannot use a comparator here to just turn the FET on or off.

    Any ideas on how to either a) keep the amp just out of saturation under these conditions and still maintain a high gain, b) reduce the current draw while in saturation?

    If I get single channel amp, and put a large resistor in series with the power pin, would that work? or would the amp go completely bonkers when it's input voltage drops below min V? Maybe someone knows an opamp with similar low draw and better saturation characteristics?

  2. crutschow


    Mar 14, 2008
    If you want to keep the MOSFET in linear region then you need negative feedback from the MOSFET.

    If you tell us the nature of the MOSFET load and what you are trying to do we can perhaps give you better information.