I use PIC 16f877A and choose PORTA as input of my switchs and have pull-up resistor 10K. So the default state of pins in PORTA is high or logic '1'. But when I use MPlab to write code ASM for my MCU, after I set trisc for PORTA as input, the state of PORTA is '00000000' that cause my switchs in PORTA are always in LOW that active state and my ciruit run automaticly as i press all that switchs.
I tried to set trisc PORTA as ouput first, initialize its state as '11111111' and set trisc PORTA as input. But value of PORTA is only changed to '01000000', that still cause wrong when I conplie and simulate in Proteus.
I tried to put my switchs to PORTC and try âgain. It has no problem as in PORTA, state of PORTC after I set trisc for PORTC as input is '11111111' that make my ciruit run exactly.
Can anyone explain and help me to solve that problem? Thanks.
My code is:

BANKSEL TRISA
CLRF TRISA
BANKSEL PORTA
MOVLW 0FF
MOVWF PORTA
BANSEL TRISA
MOVLW 0FF
MOVWF TRISA

value of PORTA and TRISA after my code is:
TRISA : 11111111
PORTA : 01000000

 

http://ww1.microchip.com/downloads/en/devicedoc/39582b.pdf​

Have you downloaded the data sheet. You will find a lot useful examples here. Here is how to setup PORTA correct for your chip. It looks like you forgot to set the ADCON1 register correct. If you write the value 0x6 to ADCON1 register your program should work. From the manual

PORTA pins(not RA4) are multiplexed with analog inputs
and the analog VREF input for both the A/D converters
and the comparators. The operation of each pin is
selected by clearing/setting the appropriate control bits
in the ADCON1 and/or CMCON registers.
On a Power-on Reset, these pins are configured
as analog inputs and read as ‘0’.
The comparators are in the off (digital)
state.​

Banksel PORTA
CLRF PORTA ; Initialize PORTA by
; clearing output
; data latches
Banksel ADCON1; Select Bank 1
MOVLW 0x06 ; Configure all pins
MOVWF ADCON1 ; as digital inputs
MOVLW 0xfF ; Value used to
; initialize data
; direction
MOVWF TRISA ; all pins as inputs
; TRISA<7:6>are always
; read as '0'.​