I am new to the fourum and this is my question hope i have put it in the right section.

If i have to design a circuit that is a logic output when the input, represented by a 4-bit binary number, is less than or equal to 2(base10) or greater than or equal to 10(base 10)

This can only be done using NAND gates and you may use
4x2 input NAND gates in one IC
3x3 input NAND gates in one IC
2x4 input NAND gates in one IC

Thanks

Kayne

 

Can you write the truth table for the circuit you need to design?

Hint: Search the forum....

 

This is the Truth table for the problem



Input Output
DEC A B C D F
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
9 1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1


I think that for all 0,1,2,10,11,12,13,14,15 are logic 1 and the rest logic 0

If I have this information do i then use K'map and find a simpler circuit?

 

Yes, on the right track.

There are a few threads on driving seven segment displays, and needing a condition for > 10. Those should be found in a brief search on this forum. There are some very good examples/discussion on implementing and simplifying that should be of value to you.

Examples are in logic maps, gate combinations from logisim, and others.

Use DeMorgan's Theorems to convert all the gates all to NAND.

 

I have had a look though you website and think i have slowly moved forward but need further help as i can not get my circuit to operated like the Truth Table. I think that i am getting my De Morgans expression wrong.



I have got the circuit to operate without the use of NAND gates firstly by making 4 sperate circuit then combining them all these are the gates needed to do this.

4 x inverters
2x 2input AND gate
2x3 input AND gate
1x4 input AND gate

I then made the individual circuits from AND to NAND and then combined them all but doing this i still cannot get my circuit to operate.



I think I am getting confused going from a Boolean expression to the De Morgan expression and then changing the circuit to NANDs.

This is the Boolean expression I have got from the K’map

F= AB+A'B'C'+AC+B'CD' ( ' denote bar over the letter)


F = (AB+A'B'C'+AC+B'CD')''

F=(AB)''.(A'B'C')" . (AC)" . (B'CD')"

F = AB . A'B'C' . AC . B'CD'


As I look at this I think that I have done something wrong as all I have done it change the signs, this cannot be right which makes me think I have done this step wrong.

If you can help me that would be much appreciated.

 

Did you find this thread? http://forum.allaboutcircuits.com/showthread.php?t=20000

I'll assume a single output (0 or 1) is given when a 4 bit digit isn't valid.

I write it a bit differently, I can read this format faster.. & = AND, ! = NOT
Invalid:
!(A & B & C & D) - 0000 - 1 4 input NAND
!(A & B & C) & D - 0001 - 1 3 input nand, 1 2 input NAND
2-10 - Valid
11 - See Below
A & B & * & * - 11xx - > 12 or negative binary, invalid, 1 2 input NAND.

All of the above will produce a 1 when true.

Feed the 4 conditions into the 2nd 4 input NAND gate to get a 1 when digit is not between 2 and 10.

A & !B & C & !D - 1011 - 11 Left as an exercise for student. Leftover gates are: 1 3 input NAND, 2 2 input NAND gates .

--ETA: This is a good writeup: http://cnx.org/content/m13240/latest/

 

Thanks for your help