Hello can someone look at this circuit diagram which has a mosfet oriented backwards? this is part of the power supply circuitry in an Olimexino (arduino) board that is designed to run off either a usb connection or a wall wart power supply.
the component FET1 is a pmosfet that is configured so the current will flow from the drain to the source in the absence of a power input at the left-side connector. the "+5V" line is the main power bus on this board. this is from the Olimex website. i've used this board extensively and have never seen a typo on the schematic. am i loosin it? why would the fet be oriented like that?

 

It acts as a diode (FET body diode) with the added benefit of the low RDSon, minimizing the losses- no 600mV diode drop.

If a MOSFET is turned ON by correct VGS conditions, it cares not which direction the current flows through the channel.

I say fiendishly clever design!

 

It acts as a diode (FET body diode) with the added benefit of the low RDSon, minimizing the losses- no 600mV diode drop.
If a MOSFET is turned ON by correct VGS conditions, it cares not which direction the current flows through the channel.
I say fiendishly clever design!

ok, it's like a so-called super diode. yeah that is pretty tricky. thanx

 

Not sure. The reason it works is that the forward voltage drop (Vf) of SD3 is less than the Vf of the body diode in FET1, so when FET1 is off its diode does not conduct. When PWR is removed, R26 pulls the FET1 gate low and the FET "shorts out" the body diode and supplies current to the output without the Vf drop lowering the output voltage. But I think the same thing would be true with the FET reversed, and in that case the body diode would be reversed and there would not be a balancing act between the two diodes.

ak

 

Not sure. The reason it works is that the forward voltage drop (Vf) of SD3 is less than the Vf of the body diode in FET1, so when FET1 is off its diode does not conduct. When PWR is removed, R26 pulls the FET1 gate low and the FET "shorts out" the body diode and supplies current to the output without the Vf drop lowering the output voltage. But I think the same thing would be true with the FET reversed, and in that case the body diode would be reversed and there would not be a balancing act between the two diodes.
ak

not sure i follow your meaning. U3 is not a fixed 5V regulator. if you look at the chip, and the feedback pin #5, you'll see that the voltage divider R3 and R4, positioned after the diode SD3, is what sets the output voltage of the chip. so that the voltage on pin #2 = 5 plus VfSD3. So that, when the FET is off, the voltage at it's source terminal is exactly 5.

 

But I think the same thing would be true with the FET reversed

If the FET were reversed it wouldn't block the 5V output from feeding back to the 5V_USB line (albeit with a 1 diode drop).

 

Yeah, I thought about that after I posted. That almost certainly is the reason for the "backwards" connection. In fact, I might have done the same thing long ago. So many schematics, so little brain...

ak