Hey all! About a week ago I didn't know what a logic gate was, but once I understood the concept I was hooked. I designed this circuit to be a sort of locking mechanism. Each input has to be pressed in sequence in order for the lock to be disengaged. If an input is pressed out of sequence (i.e. C after A but before B) the system resets.

Here's a diagram (I know its probably not very professional looking)

I just have a few questions. First of all while I understand how logic gates work and interact with each other, one thing I'm having a little difficulty with is the arithmetic. How would one express this circuit algebraically, or with a truth table?

Secondly, and the biggest mystery of all to me is the AND gates in the circuit. While I was trying to figure this circuit out at some point the AND gates made sense to me. However, after I got it to work, in my absent-mindedness I completely forgot what made sense about them. They are what make the total system reset possible after an input being pressed out of sequence, however what boggles my mind is that the output of the AND gates is never actually 1. So what exactly is happening there?

And lastly, I'm kind of curious about some other additions to this circuit I might like to make. Is it possible to make this circuit programmable. In this circuit the sequence is ABCD, but what I'm curious of is whether its possible to keep the circuit as it is and change it to something like CBDA? Also, was thinking about a lock for the lock. That is to say that if the wrong sequence is inputted three or four times in a row, the entire system is shut down and must be reset remotely.

Anyway, if anyone is up to discussing this I'd be very appreciative. Hoping to learn all I can about this.

 

Each input has to be pressed in sequence in order for the lock to be disengaged.

What logic level is reached when the input is pressed? That is not obvious.

There is a box at the bottom that is common to four NOR gates. What is its function?

Use the device designator as a search term to get data sheets that will explain the different gate functions. Try 74LS28, 74LS27, 74LS08.

 

The math you are looking for is called Boolean Algebra. You can find it taught from quite a few sources, including the AAC book links on the top of this page.

The schematic is pretty good. To show your inputs you need something like this...

The capacitor shown in the second circuit will help compensate for something called switch bounce. When a mechanical switch makes contact it doesn't always make clean contact, but can make/break many times until it settles down mechanically. The capacitor keeps the digital signal clean.

If you need to invert the switch just reverse the switch and resistor positions (and the capacitor if you are using it).

 

I suppose I did forget to put the final output in the diagram. The lock would only be disengaged after Q4 has a low output. Judging from the wikipedia article (I know, I shouldn't use wikipedia), I'm guessing that the logic level would be Q4.

I put the button in at the bottom to serve as a master reset while I was testing the circuit. I had no idea that this was so common.

Thanks for the insight on the data sheets! I'll definitely need to look into more of these.

 

yeah, this is good men. Keep it up ;-)

 

Download logisim and play with the examples and tons of tutorials for logisim on the net (Freeware/GNU).

It will light up the lines that are "high" and show the state of each gate, allowing you to understand how it is working.

The diagram above looks like a black and white version of a logisim image, so forgive me if you already are using it.