As attached schematics, when MISO piin of multiple slave devices is connedcted, SLAVE0 MISO output signal can be transfered to MISO pin of SLAVE1, SLAVE2. This means that input signal is applied into output pin.
It seems that this damage SLAVE1, SLAVE2 device. If this is right, please
advise me how to avoid this problem. It seems that it can be avoided using diodes. Is this right?

Thanking you in advance
Regards,
SunSung

 

It depends on the internal circuitry of the slaves.

What ICs are the slaves?

 

Thanks.

SLAVE is ADC (AD7734).
AVR2560(MCU) -> CD74HC4050(BUFFER) -> 2 AD7734s(ADC)
-> CD74HC4050(BUFFER) -> 2 AD7734s(ADC)
-> CD74HC4050(BUFFER) -> 2 AD7734s(ADC)
-> CD74HC4050(BUFFER) -> 2 AD7734s(ADC)
The similar problem exist at one MISO Pin on MCU with 4 CD74HC4050s.

Please send me a kind advise.

Best regards,

 

It would help us diagnose your problem better if you could attach a schematic of your circuit. However it sounds like you may have some bus contention problems introduced by the 4050 buffers if you used them to buffer the signals from the slaves back into the atmega micro.

hgmjr

 

As attached schematics, when MISO piin of multiple slave devices is connedcted, SLAVE0 MISO output signal can be transfered to MISO pin of SLAVE1, SLAVE2. This means that input signal is applied into output pin.
It seems that this damage SLAVE1, SLAVE2 device. If this is right, please
advise me how to avoid this problem. It seems that it can be avoided using diodes. Is this right?

Thanking you in advance
Regards,
SunSung

This is not correct. If you read the datasheets carefully you will note that most devices enable the MISO pin ONLY when their Chip Select input is asserted. If you find a device that does not do this you can use a buffer like 74VHC1GT125 with an active low enable connected to Chip Select to enforce this behavior.

 

You can use buffers with open collector output for each MISO output pin from the Slave. Then you can connect all the open collector outputs together without worrying about shorting two outputs together.

Simple buffers can be made with transistors or comparators.

 

You can use buffers with open collector output for each MISO output pin from the Slave. Then you can connect all the open collector outputs together without worrying about shorting two outputs together.

Simple buffers can be made with transistors or comparators.

Except open collector buffers might have too slow a rise time for a very fast SPI like say 24 MHz. The rise time can be estimated from the value of the pullup and the distributed capacitance of the outputs and the MISO input on the master. The peripheral should tri-state MISO, but if not use a tri-state buffer as indicated above.

 

Please send me a kind advise.

Remove your buffers from the circuit

 

The "kind advise" -- Pick and read the !@#$%^&*() datasheet!!!

 

Many thanks for your kindness.

I requested to ADI, and get a response as "You are forbidden to do like that. But you can add a diode to have a try. The signal chain is: DOUT---Diode---MISO. A diode is a two-terminal electronic component that conducts electric current in only one direction, so the 2nd DOUT can't disturb the 1st DOUT. Please test if this can work.".

So, I decided AND GATE between two 4050 and MCU MISO port.
And tested it with successful result.

Please feel free to comment about this approach.


Best regards,