Hi guys,
I'm looking at the MAWD on the 3rd page of this link : http://www.phy-astr.gsu.edu/nelson/AN-31.pdf
could somoene explain how this works ?
I understand that they are a bunch of comparators, but can someone explain the FETs ?
hers's what i understand,
once the first op-amp (V4 and Vin) goes HIGH ( ie: Vin > V4 ) , the fet is conducting, therefore, Vin appears at the positive terminal beign compared to V3 .... doesn't that mean that the output from the second opamp goes HIGH when the first condition is satisfied ( Vin > V4 ) AND Vin > V3 ?
Thanks guys
My apologizes this should have been posted in the General Electronics section
I'm looking at the MAWD on the 3rd page of this link : http://www.phy-astr.gsu.edu/nelson/AN-31.pdf
could somoene explain how this works ?
I understand that they are a bunch of comparators, but can someone explain the FETs ?
hers's what i understand,
once the first op-amp (V4 and Vin) goes HIGH ( ie: Vin > V4 ) , the fet is conducting, therefore, Vin appears at the positive terminal beign compared to V3 .... doesn't that mean that the output from the second opamp goes HIGH when the first condition is satisfied ( Vin > V4 ) AND Vin > V3 ?
Thanks guys
My apologizes this should have been posted in the General Electronics section