Hello everyone,
I am new to this forum and I have a question regarding multi-bit logic gates.
I am trying to understand how does a multi-bit gate works, here is a 16-bit AND gate as an example:
/**
* 16-bit and gate. For i=0..15 out = a and b
*/
CHIP And16 {
IN a[16], b[16];
OUT out[16];
BUILTIN And;
}
This code is written in HDL(Hardware descriptive language) and when I run it in a hardware simulator, for these inputs:
a[16]=10000
b[16]=11111
I get: out[16]=8960
Can someone make me understand how did it compute this number?
I thought that it would compare each bit alone and output either 0 or 1
for example:
a[16]= 10000
b[16]= 11111
out[16]= 10000
Thanks!
I am new to this forum and I have a question regarding multi-bit logic gates.
I am trying to understand how does a multi-bit gate works, here is a 16-bit AND gate as an example:
/**
* 16-bit and gate. For i=0..15 out = a and b
*/
CHIP And16 {
IN a[16], b[16];
OUT out[16];
BUILTIN And;
}
This code is written in HDL(Hardware descriptive language) and when I run it in a hardware simulator, for these inputs:
a[16]=10000
b[16]=11111
I get: out[16]=8960
Can someone make me understand how did it compute this number?
I thought that it would compare each bit alone and output either 0 or 1
for example:
a[16]= 10000
b[16]= 11111
out[16]= 10000
Thanks!