MOSFETs

Discussion in 'General Electronics Chat' started by Wendy, Apr 10, 2009.

  1. Wendy

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    I'm thinking of playing with some MOSFETs to try to understand them better. I studied JFETs in college, and I think I have a pretty good handle on them. I'm only interested in digital modes at this point.

    Power MOSFETs, on the other hand, are pretty strange in some ways. The gate capacitance issue, for example. What is a good approximation of where you start having to worry about the frequency of the PWM?

    The other thing is the 10V on/off signal I keep seeing described for proper operation, with some lesser voltage mentioned for other devices. How do you determine from the data sheet what the control voltage is?

    Looking at the IFR510, which is sold by Radio Shack, is a bit confusing. Is the V(GS) (which is +/- 20V) saying it needs 20V to switch fully?

    BJ Micro has several, the IFR520 seems pretty similar (same V(DS)).

    Assuming capacitance is an issue, I have to use drivers to drive the gates both positive and negitive quickly, such as a push/pull transistor pair?

    I also notice all the power MOSFETS are N Depletion types. How common is this?

    Thanks.
     
  2. t_n_k

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  3. eblc1388

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    +/-20V is the max range of allowable gate voltage beyond which the MOSFET could be damaged.

    Many have made the common mistake of using Vgs(th) gate threshold voltage as the operating voltage of a MOSFET. Don't. The MOSFET will only conduct less than a few mAs with this voltage.

    A usefully figure is usually obtained from the rated Drain current which the manufacturer will often quote along with what Vgs will be associated to get this current. This Vgs will be the operating Vgs if one wants to operate the MOSFET to get that Drain current. Usually this is 10V for common, non-logic level N-Ch MOSFET.

    If there is no mentioning of wording "logic level" on the first page of the datasheet then it is probably not one. Logic level is a good selling point for the MOSFET, which enable it to switch fully using just the I/O Pin voltage of common MCUs which can be as low as 3~5V. The manufacturer is thus keen to make sure you get this information.

    Its the other way round. Most are enhancement mode.
     
  4. Wendy

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    OK, that points out something I needed to know. I thought most drawings showed this...

    [​IMG]

    which is a depletion mode NMOSFET.

    The correct schematic symbol is...

    [​IMG]

    which is a enhanced mode NMOSFET.

    Am I misremembering or mistaken?

    An enhanced mode NMOSFET will be normally off, until the gate is brought high (which could be the same voltage level as the source). Any problems with this statement? The gate is a relatively high capacitance, how high? I've heard most MOSFETs take 10V to turn fully on. If this isn't true, where do I find the spec?

    I was wanting to play with enhanced mode anyhow, since they are the core to CMOS logic.

    BTW, I've added this to my pinout template in my PaintCAD.

    [​IMG]
    .
     
    Last edited: Apr 11, 2009
  5. jpanhalt

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    Not sure what you mean by the underlined statement. In the most common switching configuration of the N-channel, i.e., low-side, source is grounded. The gate needs to be about +10V relative to that to turn on non-logic devices. If the mosfet is high-side, then the gate needs to exceed the upper rail, as the source potential may actually approach the upper rail potential.

    John
     
  6. beenthere

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    It's more conventional to show the source as the lowest terminal (connects to ground more easily). The left image is also most conventional.
     
  7. Wendy

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    OK, sounds like I'm misremembering incorrectly. I seem to see the right image more often.

    It takes no real extra effort (other than understanding) to draw a schematic correctly. I'm trying to get there.

    Is the drain the positive lead in a nMOSFET (and by extension, source negative)? The arrow is pointing to the Drain, as I interpret it, which would make it negative.

    Assuming enhanced nMOSFET from now on, the gate needs to be +10 more positive than the Drain?

    Have patience, I'll be getting to the schematics and experimentation phase soon, then I'll be a real pain!

    If you answered anything during my extensive editing, I apologize. I'm trying to get my thoughts straight. Once I get this down, it will take a brick to dislodge it.
     
    Last edited: Apr 11, 2009
  8. mbohuntr

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  9. eblc1388

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    I think it should be +10V more positive than the Source. But remember, when this +10V is applied to the gate, the Source & Drain channel conducts and has a low resistance. So now it does not matter if the 10V is measured w.r.t. to Source or Drain.

    A few points to note:

    1. many schematics were drawn using the depletion mode symbol to represent any MOSFET. Arrow pointing towards the gate is a N-Ch MOSFET.

    2. a MOSFET is a 4 terminal device, the gate, source, drain and body(substrate). The body terminal is usually connected to source inside the device encapsulation and not brought out to the outside world. For some devices, it can be brought out and serve useful function as current sensing.

    3. there is a body intrinsic diode between Source and Drain which will conduct even if no gate drive is applied. In N Channel MOSFET this diode is pointing from Source to Drain so will conduct if the Source voltage is higher than the Drain. The datasheet will give the current rating and switching time of this intrinsic diode. However, the rating/performance of this diode is usually crap and more a hindrance than a blessing in fast switching circuit.

    4. excessive gate drive voltage over the datasheet allowable limit will damage the MOSFET instantly.
     
  10. Wendy

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    I thought I'd been seeing that. The problem is, on is normally on, and the other is normally off, so I'd say it matters. I'll keep it straight on my schematics.

    OK, simple enough, I saw the diode and dismissed it. It's a pretty clear guide as to which is positive and negative. I have a little trouble with Source and Drain being interchangable without the diode designation though, how would the device reference the voltage otherwise? The Gate has to be positive in relation to something.

    Thanks.
     
  11. mik3

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    Feb 4, 2008
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    The frequency at which a MOSFET cannot respond mostly depends upon its gate capacitance.

    Most MOS to fully turn on need a voltage higher than 10V (up to the limit stated in the datasheet of each one). Also, some logic level MOS turn fully on at 5V to be used with digital ICs.

    To turn a MOS on fast and minimize the switching losses you need to charge its gate capacitance as fast as possible. Thus, you can use a driver IC or a bipolar transistor to drive the gate.

    Most MOS are n-channel type because the majority carriers in N-type materials, which are electrons, have greater mobility than holes. Thus, they tend to be more efficient.
     
  12. SgtWookie

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    The gate voltage is specified in relation to the source terminal; ie: Vgs.
    With enhanced MOSFETs, when Vgs=0, the drain and source are essentially disconnected (off, or open circuit). With standard N-ch power MOSFETs, when Vgs=10, they will be fully turned ON (maximum conductivity between the drain and source).

    An IRF510 is a standard N-ch power MOSFET.
    An IRL510 is a logic-level power MOSFET.

    Not to confuse things, but P-ch MOSFETs are also off when Vgs=0. When Vgs=-10, they are ON; when the gate voltage is 10v more negative than the source. You can quickly tell whether a datasheet is for a P-ch or N-ch MOSFET by Id (drain current) or Vgs specifications, as these numbers will almost always be shown as [eta] negatives for P-ch, and positive for N-ch.

    Gate charge (total charge, Miller charge, etc) is usually specified in nC's, or nanocoulombs.
    http://en.wikipedia.org/wiki/Coulomb

    There is a fairly high correlation between the voltage rating (Vdss), drain current (Id) and gate charge. Newer design MOSFETs tend to have lower gate charges for comparable Vdss and Id ratings.

    The faster you're trying to switch a MOSFET on and off, the more current you'll consume in charging/discharging the gate of the MOSFET, and the greater the amount of time that the MOSFET will spend in the linear region, where it will dissipate power as heat.
     
    Last edited: Apr 17, 2009
  13. Wendy

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    Can this capacitance be measured with a meter?

    Does the base capacitance vary, say with voltage on the DS?
     
    Last edited: Apr 12, 2009
  14. SgtWookie

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    Not really. The "Miller charge" causes the gate charging rate to be non-linear. Have a look at the attached simulation; it's a comparison of two different MOSFET gate driver circuits. Look at the pink trace, which is the voltage on the gate of M2. See the hesitation at around 2.3v? That's the Miller charge. Notice that the red trace (M1's gate voltage) is by comparison a much more effective method of charging/discharging the gate.

    It can.
     
  15. Wendy

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    OK, I think I have it. The reason CMOS ICs work so well on power consumption is they are very small, so their capacitance is correspondingly small, which make then really efficient.

    The bigger surface area in the power versions means large surges, but when it settles down almost no current is drawn through the gate, for all intents and purposes no current.

    So power type circuits should be planned for switching, even though wattage won't be an issue, unless higher frequencies are used for switching. I wouldn't qualify 6-12Khz as high frequency myself.

    The owner at Tanner's mentioned that once the Gate is charged (and the transistor is switched on) it will stay on, even if the gate is disconnected from any contacts. I seem to remember a post asking about something like that. If the effect is really long term it might be possible to use two buttons to turn it on/off.

    Again, my thanks.
     
  16. SgtWookie

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    I wouldn't leave the gate "floating". Even though it has very high impedance from the gate to either drain or source, it isn't infinite. Over time, the charge will decrease, and the MOSFET will wind up in the linear region.

    Tying the gate to the source with a resistor is a good idea. That way, if the gate drive circuit fails or is removed from the circuit, the gate discharges through the resistor and turns the MOSFET off. Otherwise, the circuit might wind up running wide open; depending on the load that might lead to smoke being released.
     
  17. Wendy

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    What would be a nice heavy load at 12VDC? Something like a 25W bulb perhaps. Wonder if I can get my hands on a old headlamp. :)
     
  18. SgtWookie

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    Seems to me that halogen headlamps are in the 50w to 60w category (per filament)

    1157 brakelight bulbs are around 25w I think.

    Junkyards are full of used headlights/taillights - and you can even snip the harness off so you'll have something to wire it up with. ;)
     
  19. Audioguru

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    Don't forget that an incandescent light bulb draws up to 10 times its normal current when it is turned on (its filament's resistance rises as it heats).
     
  20. Darren Holdstock

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    Feb 10, 2009
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    A very good question, to which alas there is no simple answer. For a PWM controller it's a matter of finding the most efficient balance between static losses (essentially the power wasted through Rds(on)) and switching losses (a combination of losses through charging/discharging parasitic capacitances and finite switching times briefly operating the MOSFET in the linear region).

    As the parasitic capacitances are more-or-less a function of Rds(on) - lower Rds(on) means higher Cs - this means that for a given MOSFET there will be an operating PWM frequency that gives the most efficient operation; or conversely, for a PWM system (for a given load and input voltage) there will be a MOSFET with the best balance of Rds(on) and Cs for maximum efficiency. The equations for working this out can be a bit nasty, not aided by some of the parameters needed not being quoted in most MOSFET datasheets. Some good sources of info on this may be found at smps.com and edn.com; alternatively, google "MOSFET switching losses".

    There is a simpler empirical way of choosing the most efficient switching MOSFET for a PWM controller - audition them. Take your PWM circuit, and for a constant input voltage, PWM frequency and output load, try a number of MOSFETs and observe the current drawn by the circuit. The most efficient MOSFET will draw the lowest current.
     
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