MOSFET driving too slow

Discussion in 'General Electronics Chat' started by dbk_88, Dec 18, 2012.

  1. dbk_88

    Thread Starter New Member

    Dec 18, 2012
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    Hello,

    I'm trying to drive a MOSFET with a BIPOLAR transistor.

    I'm doing simulation but I have an issue

    This is my schema :

    [​IMG]

    I drive my BIPOLAR with 0-3v and the MOSFET with a 0-12v (approximatively)

    The problem is my BIPOLAR collector resistor is too big, when I turn on the MOSFET there is not enough current going into the gate and it's really slow.
    I could take a lower resistor but then my circuit will consume too much current.

    So do you know a way to drive my MOSFET quickly ? Can I keep the same circuit or do you know an other one (I heard about totem pole but I'm not sure it's good for my application) ?

    Thank you
     
    Last edited: Dec 18, 2012
  2. Papabravo

    Expert

    Feb 24, 2006
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    You need a push-pull or totem pole driver. The transistor is an active pull down to turn the FET off, but the collector resistor is trying to charge the gate capacitance of the FET which might be like 4000 - 6000 pf.
     
  3. dbk_88

    Thread Starter New Member

    Dec 18, 2012
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    I looked about your push-pull circuit.
    I found this website : http://electromotiveforces.blogspot.fr/2011/05/push-pull-output-using-complementary.html

    I am trying to simulate the circuit B.

    [​IMG]

    I have a question about the base resistors.
    If I take very low value of resistors, the current, allowed into the bipolar transistors will be high.
    But once my mosfet is turned on or off, its gate doesn't draw current anymore, right ?
    So can I choose very low value for my base resistor or it's gonna be a problem ?
     
  4. Papabravo

    Expert

    Feb 24, 2006
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    I'm not quite sure I know what you are driving at. The current into the base is limited by the base resistor(s) and the driving voltage. It is either 0 or some fixed amount. The collector (emitter) current will cover a range of values as the gate charges or discharges. There will be a maximum value which will be obvious in your simulation and the decay will be exponential as it is with all capacitive loads. As long as the transistor can handle the maximum collector(emitter) current you should have no problem.

    When you run the simulation you will see the gate voltage reach a "plateau" and stay there for some period of time before going to it's final value due to the "Miller Effect", common to an inverting amplifier which the FET is while in the linear region.
     
  5. dbk_88

    Thread Starter New Member

    Dec 18, 2012
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    Ok, I'm trying to fully turned on a MOSFET.

    My question was about the bipolar, how to choose the bases resistors values. Do I choose them to get the maximum collector current admissible ?
     
  6. Papabravo

    Expert

    Feb 24, 2006
    10,140
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    The bipolar device is current in-current out. What you want is a current source-sink that will move the charge on and off of the FET gate as fast as possible. As long as you observe the device limitations you should be fine. since you are simulating this you can afford to make egregious mistakes with very little cost.

    The process is stable in the sense that large currents go to and from the gate for only a short period of time. As soon as current starts to flow in either direction the voltage changes in such a way as to reduce the current toward zero exponentially. After five time constants it is essentially zero (6.73E-3).

    Also you can't get rid of the Miller Effect but you can reduce the amount of time that it affects the circuit.

    Simulate and observe.
     
  7. JMac3108

    Active Member

    Aug 16, 2010
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  8. dbk_88

    Thread Starter New Member

    Dec 18, 2012
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    I made some simulations on the circuit B.

    This is the schema I simulate on Pspice :

    [​IMG]

    I've chosen the bases resistors R4 and R5 to get a maximum emitter current of 10mA.

    But when I watch the emitter current of my bipolar Q2, I have a current pic of 200mA :

    [​IMG]

    This pic of current appears when I turn-off Q1.

    My question is : why Q2 is not limiting the emitter current at 10mA ?
     
    Last edited: Dec 22, 2012
  9. GopherT

    AAC Fanatic!

    Nov 23, 2012
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    Think of the gate on your MOSFET as a capacitor. Current will flow quickly to charge or discharge your gate quickly. There is no getting around the fact that your gate is a capacitor. Also, you selected the components you did to charge/discharge quickly. By definition, changing / discharging quickly means high current flows.
     
  10. GopherT

    AAC Fanatic!

    Nov 23, 2012
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    Also, the spike is only lasting ~200nSec. What is your concern with this peak? Remember, the current is not flowing through the MOSFET to your load, it is only charging/discharging the gate capacitance. The gate of MOSFETS allow very low current FLOW, that is the big benefit of MOSFETS.
     
    Last edited: Dec 22, 2012
  11. dbk_88

    Thread Starter New Member

    Dec 18, 2012
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    I thought Q1 was limiting the emitter current at 10mA even if the MOSFET gate wanted more.

    So that's mean the transistor is not limiting the current during a short period of time. I don't get it ? It's suppose to be its role ?
     
    Last edited: Dec 22, 2012
  12. tindel

    Active Member

    Sep 16, 2012
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    Your bipolars won't limit the current, per se. Not in this configuration, anyway.

    Bipolars are current amplifiers, so when your driver goes to 0V, then your current in the base is about (12-.5V)/325k = 35uA. Your collector current will then be 35uA * hFE (in the datasheet). hFE is usually around 150 for this transistor, but can very wildly. So your collector current will be about 5mA until you've charged up your MOSFET. Note that you're also driving with a input capacitor. So it takes ~32.5ms to charge that cap to the desired voltage, and that is probably why you are seeing higher currents - because you have Ib in the 325k resistor and ib through the cap, for a certain amount of time.

    Note when you drive high, your pnp will still be on, just pushing less current. Your npn will also turn on... letting current 'shoot thru' your bipolar leg, causing the FET to turn-off slowly (if at all, depending on hFE), and dissipate more power. Are you sure that's what you want to do? Are you planning on using a uC to drive your FET?
     
  13. dbk_88

    Thread Starter New Member

    Dec 18, 2012
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    Thank you for the answer, I understand now.

    Yes I'm going to use a uC to drive my mosfet.
    So, what you say is when I turn-on the NPN I should also turn-off the PNP ?

    If that's what you mean I'm going to look at it. But in my simulation the turn-off time is not slower than the turn-on time (it's probably because I allow a higher value of current into my NPN than into my PNP)
     
  14. ScottWang

    Moderator

    Aug 23, 2012
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    You can choose b) as the below circuit and set the value to suit your need.
    You may no need the Rbe1.

    [​IMG]
     
  15. tindel

    Active Member

    Sep 16, 2012
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    Exactly! You want the gate voltage to be either 12V or 0V nothing in between, with as little resistance possible for fastest state changes. Of the two types of push-pull circuits that you posted earlier it is typically more usefull with circuit A instead of circuit B. Circuit B allows both transistors to be on at the same time. Circuit A ensures that only one transistor will be on at a time. And there is a band where both transistors are off. You probably want to add a dummy load between the gate and source to ensure the input of the FET never floats, and defaults to off.

    Scott shows another way to control the circuit... however, your turn-off time will be a function of RL - and provide a similar, but opposite effect of what you were experiencing before.
     
  16. dbk_88

    Thread Starter New Member

    Dec 18, 2012
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    Ok, so you say I could use the circuit A.
    But that kind of circuit need a symetrical input voltage (-3v, +3v for example) right ? Because in my application my driving voltage is only 0, +3v
     
  17. tindel

    Active Member

    Sep 16, 2012
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    I'm not sure what you mean by symetrical input. A rail-to-rail input should work. Add another npn transistor circuit on the output of your uC... this should drive to the high and low rail and verify you turn off one of the push-pull transistors, regardless of state.
     
  18. vrainom

    Member

    Sep 8, 2011
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    I think the ciruit you mention should be something like this:

    [​IMG]

    You'll see that it's basically the circuit you posted at the beginning but with the push pull transistors added, this is because they're in the emitter follower configuration, that is, they will follow the voltage you put in the bases minus the voltage drop of the transistors. Ideally, when q1 is off the bases will receive 12v through resistor r2 and the gate of the mosfet will receive about 11.4v, and when q1 is on, the bases will receive 0v and the gate will receive about .6v.
     
  19. dbk_88

    Thread Starter New Member

    Dec 18, 2012
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    I tried to simulate your circuit and see how it worked, I have a question :

    When Q1 is turned-on I see a negative current in the base of Q2 during a short period of time. This is normal I guess.
    But I also see a negative current (-0.8mA) in the base of Q3. Is that normal ?
    It means a current if going from the emitter to the base. It's not dangerous for the transistor ?
     
  20. Ron H

    AAC Fanatic!

    Apr 14, 2005
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    Most of the negative base current you are seeing is flowing through the base-emitter capacitance during the short time when that junction is being reverse-biased (When Q1 begins to turn on). It is not harmful.
    A small portion of the negative base current of Q3 is charging the collector-base junction.
     
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