We know that for a given Vgs, as Vds increases, it channel at the drain end starts narrowing down.
For Vds >= Vgs, transistor enters saturation region and channel at the drain end pinches off.
The question is, how come most of the digital circuits operate in saturation region as in pinch off region, the conduction
at the drain end reduces due to pinch off effect?
For Vds >= Vgs, transistor enters saturation region and channel at the drain end pinches off.
The question is, how come most of the digital circuits operate in saturation region as in pinch off region, the conduction
at the drain end reduces due to pinch off effect?