MOS transistor in saturation region

Thread Starter

sharanbr

Joined Apr 13, 2009
82
We know that for a given Vgs, as Vds increases, it channel at the drain end starts narrowing down.
For Vds >= Vgs, transistor enters saturation region and channel at the drain end pinches off.

The question is, how come most of the digital circuits operate in saturation region as in pinch off region, the conduction
at the drain end reduces due to pinch off effect?
 

Bordodynov

Joined May 20, 2015
3,180
For Vds >= (Vgs-Vt), transistor enters saturation region and channel at the drain end pinches off, But the current is not zero. Typically,Vds <=(Vgs-Vt). Only during the switching mode transistors saturate.
 

Thread Starter

sharanbr

Joined Apr 13, 2009
82
Dear Bordodynov,

Assume the output of a CMOS transistor is 0.

Then, due to change at the gate input of the transistor
1) PMOS is turned on and NMOS turns off
2) PMOS starts charging the output node to 1 and NMOS is effectively off
3) Once output node reaches drain voltage then no current flows further

Kindly help me understand. I assume all through step 2 and 3 above, the PMOS transistor is operating in saturation region.
The speed of the transistor (and hence speed of the circuit) will depend on how fast step 3) can be achieved.
Hence during this step, since transistor is operating in saturation region, the current flow is slow and hence output switching happens slower.

Let me know if my understanding is correct.
 

Thread Starter

sharanbr

Joined Apr 13, 2009
82
Dear bordodynov,

I just looked at the Vds vs Ids curve and realise that Ids though saturated, is definitely higher when compared with current in actve region. So, I got answer to my question...
 

Thread Starter

sharanbr

Joined Apr 13, 2009
82
Sorry, I am opening the thread again ... I have one more question.

I took a look at the transistor cross section view when it is in active region and when it is in cut off.
I have attached a figure to explain my question.

In saturation region, it appears that the width of the conducting channel remains same but the depth of the channel reduces at the
drain end of the transistor. So, as the transistor enters saturation region, actually I would assume that, due to pinch off effect, the Id to drop from its peak and then probably saturate. But what I see is that the Id goes to peak value and then saturates.

Thanks,
 

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