Mess with logic gates

Discussion in 'General Electronics Chat' started by papagaya, Dec 7, 2011.

  1. papagaya

    Thread Starter New Member

    Dec 11, 2010
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    0
    Hi. Please I need help with the output currents and voltages of logic gates. I only want to make a simple circuit in which a light is turned on depending on the state of 3 switches, but when reading more and more about logic gates more confused I am, and have not enough knowledge to understand the internals of a logic gate.

    For instance according to the datasheet, my TI SN74LS08 (Positive AND Gate) can source up to 8mA when the output is low (0V) and sink 0,4mA when high (5V). So theoretically, if i want to turn on a LED with both inputs high, besides is not enough current, because the IC will sink current, the anode should go to Vcc and the cathode to the output pin, is this so?. And if needed, the transistor should be PNP, right?.

    Well, testing with the breadbord in real life all is happening reversed (and what I think seems more logical). When both inputs are high the output is high (5V) and the LED is turned on, but only if the anode is connected to the output and the cathode to ground.

    As you can see is such a huge mess for me. When and where is flowing the current?.
     
  2. sheldons

    Active Member

    Oct 26, 2011
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    Heres a simple circuit you can try....tie all unused gate inputs either to ground or supply via a 1k resistor
     
  3. papagaya

    Thread Starter New Member

    Dec 11, 2010
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    0
    As I understand in that schematic, when the the inputs are high, the output is high, there are 5V at output and there is a load, so the current (5 mA) flows towards the base of the transistor, which turns on the led ... Ok, the important thing for this is that current is flowing OUT of the IC.

    Then, what is the meaning of IOH and IOL in the datasheet?. If IOH means something like the maximum current that the IC can source through the output, at high level, what does means the -0,4 mA of the datasheet compared to the 5 mA of the schematic?.
     
  4. papagaya

    Thread Starter New Member

    Dec 11, 2010
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    0
    Nobody? :confused:
     
  5. Wendy

    Moderator

    Mar 24, 2008
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    Think instead of ones and zeros. You pick up the rest with practice.
     
  6. tracecom

    AAC Fanatic!

    Apr 16, 2010
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    I agree with you that the datasheet seems to contradict logic, and therefore it must be due to a misunderstanding of the datasheet. Believe what is logically correct and what you have empirically proven. I think the explanation might be in the attached document, but it's too late and I am too tired to understand it tonight.
     
  7. sheldons

    Active Member

    Oct 26, 2011
    616
    101
    The Current available at an output with input conditions applied that
    according to the product specifications will establish a low
    level at the output=IoL

    The Current available at an output with input conditions applied that
    according to the product specifications will establish a high
    level at the output=IoH
    butttt as bill points out you dont need to go that far into it as yet-just think of the ip states on a gate (whatever type)for a given output-h=high or logic level 1,L=low or logic level 0....
     
  8. tracecom

    AAC Fanatic!

    Apr 16, 2010
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    1,393
    It looks like the OP is long gone, and probably no one cares except me, but I like to understand things when I can. Here's the textbook answer and it's actually quite simple. It's from the sixth edition of Digital Fundamentals by Thomas L. Floyd.
     
    Last edited: Dec 9, 2011
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