MC1496 monolithic balanced modulator spice model

Discussion in 'General Electronics Chat' started by t06afre, Dec 18, 2010.

  1. t06afre

    Thread Starter AAC Fanatic!

    May 11, 2009
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    I have toyed with a circuit idea. And during xmas holiday a plan to do some simulations just to check if my idea may work or certainly not work. The chip I am going to use is a MC1496 balanced modulator. But I do not have any spice model. Can anyone help me out here? Also please tell me which package type the model is designed for. DIP and metal cans have different pin number
     
  2. Ron H

    AAC Fanatic!

    Apr 14, 2005
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    Here is a library file that contains subcircuits that I created for both the 10 pin (LM1496H) and the 14 pin (LM1496N) versions. I'm including a sample .ASC file so you can see how they are used in LTspice. For any other version of spice, you're on your own.:D

    If you are using LTspice, copy and paste the following into Notepad, then save in your SUB folder as LM1496.lib.

    Code ( (Unknown Language)):
    1. *LM1496N 14 pins
    2. *              +sig_in gain1 gain2 -sig_in bias out1 NC  +carr_in NC  -carr_in NC  out2 NC  V-
    3. .subckt LM1496N    1      2     3      4     5    6   7      8     9      10    11   12  13  14
    4. Q1 6 8 N001 0 CA3046
    5. Q2 12 10 N001 0 CA3046
    6. Q3 6 10 N002 0 CA3046
    7. Q4 12 8 N002 0 CA3046
    8. Q5 N001 4 3 0 CA3046
    9. Q6 N002 1 2 0 CA3046
    10. Q7 3 5 N003 0 CA3046
    11. R1 N003 14 500
    12. Q8 2 5 N004 0 CA3046
    13. R2 N004 14 500
    14. Q9 5 5 N005 0 CA3046
    15. R3 N005 14 500
    16. R101 7 9 1e12
    17. R102 9 11 1e12
    18. R103 11 13 1e12
    19. R104 13 7 1e12
    20. R105 13 0 1e12
    21. .ends LM1496N
    22. *******************
    23.  
    24.  
    25. * LM1496H 10 pins
    26. *              +sig_in gain1 gain2 -sig_in bias out1  +carr_in  -carr_in  out2  V-
    27. .subckt LM1496H    1      2     3      4     5    6     8    10   12   14
    28. Q1 6 8 N001 0 CA3046
    29. Q2 12 10 N001 0 CA3046
    30. Q3 6 10 N002 0 CA3046
    31. Q4 12 8 N002 0 CA3046
    32. Q5 N001 4 3 0 CA3046
    33. Q6 N002 1 2 0 CA3046
    34. Q7 3 5 N003 0 CA3046
    35. R1 N003 14 500
    36. Q8 2 5 N004 0 CA3046
    37. R2 N004 14 500
    38. Q9 5 5 N005 0 CA3046
    39. R3 N005 14 500
    40. R101 7 9 1e12
    41. R102 9 11 1e12
    42. R103 11 13 1e12
    43. R104 13 7 1e12
    44. R105 13 0 1e12
    45. .ends LM1496H
    46. **************************************
    47.  
    48. .model CA3046 NPN (IS=10.0e-15 XTI=3.000e+00 EG=1.110e+00 VAF=1.00e+02 VAR=1.000e+02
    49.  
    50. BF=145.7e+00 ISE=114.286e-15 NE=1.480e+00 IKF=46.700e-03 XTB=0.000e+00 BR=.1000e+00
    51.  
    52. ISC=10.005e-15 NC=2.000e+00 IKR=10.00e-03 RC=10.000e+00 CJC=991.71e-15 MJC=0.333e-00
    53.  
    54. VJC=0.7500e-00 FC=5.000e-01 CJE=1.02e-12 MJE=.336E- 00 VJE=0.750e-00 TR=10.000e-09
    55.  
    56. TF=277.01e-12 ITF=1.750e-00 XTF=309.38e+00 VTF=16.37e+00 PTF=0.000e+00 RE=0.0e+00
    57.  
    58. RB=0.00e+00)
     
  3. t06afre

    Thread Starter AAC Fanatic!

    May 11, 2009
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    Nice one Ron:). I will be using Altium for simulation. I am looking forward to test your file. Perhaps to day. Just need some time to draw the schematics.
     
    Last edited: Dec 18, 2010
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