Mastermind - Digital Logic

Discussion in 'The Projects Forum' started by LucidDreamer, May 3, 2011.

  1. LucidDreamer

    Thread Starter New Member

    May 3, 2011
    Hello guys. Have a big DLD project due in upcoming weeks and need a bit of guidance on how to efficiently implement the game Mastermind.

    I am currently generating a 4 digit random number which is unknown to the player and allowing said player to use 8 button keypad to control which 4 digit number he wishes to guess. These binary numbers get sent to 4:1 multiplexers which have the data select inputs controlled by a clock (11 up counter, 4 counts. The random number is sent to other multiplexers which are clocked at f/4. Multiplexer outputs get brought to a single comparator which feeds a shift register 16 bits which correspond to how close the guess is to the actual number

    Rules of the game are at that link.

    In terms of accurately following the rules of the game, I am having a bit of trouble. I know which bits correspond to a correct number in the correct digit but what trips me up is the correct number in the wrong digit. Some things have precedence over this part of the feedback of the game, and duplicates complicate the matter further as now the user inputted numbers have to compared at some point to allow for xor operations and or operations to spit out the right feedback.

    I actually have a solution which would require 6 additional comparators, 2 OR ICs and 7 XOR ICS, but that is not a viable solution in my opinion and would just take a boat load of time. I hope and know there is another solution.

    If anyone understands the game or wishes to read up on the rules real quick and assist me i would be very appreciative.

    Hope to hear from someone soon.