LTSpice simulation of RC circuit on DC votage

Discussion in 'Homework Help' started by bug13, Feb 13, 2012.

  1. bug13

    Thread Starter Well-Known Member

    Feb 13, 2012
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    Hi I am a first year electronic student, I am trying to simulate a simple RC circuit with a DC votage, and I get a straight line current, instead of a cure line current like this

    what have I done wrong?
     
  2. t_n_k

    AAC Fanatic!

    Mar 6, 2009
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    Did you check "Skip initial operating point solution" checkbox under

    Simulate / Edit Simulation Cmd / ....
     
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  3. bug13

    Thread Starter Well-Known Member

    Feb 13, 2012
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    Thanks t_n_k, it works for me now, but can you explain what does it do for me please, as I have googled that but didn't come up something make sense for me.
     
  4. t_n_k

    AAC Fanatic!

    Mar 6, 2009
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    I think this stops the LTSpice engine form computing the initial conditions on energy storage elements such as L's & C's as if the source had been applied to the circuit a long time before t=0 [start of transient solution].
     
  5. Ron H

    AAC Fanatic!

    Apr 14, 2005
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    You can also label the output node (call it "out", or whatever), and then add a spice directive .ic v(out)=0.
     
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