Hello...

I am designing a 450V power supply with 1mA max current. It needs to accept from 9V to 18V at the input.

I have design the circuit in the attached file and tested the prototype, however the current consumtion of the real circuit is double as the simulated. 50mA vs 10mA in stable state. It gives a very poor efficiency.

The TF used is a Coilcraft DA2032

Questions:

1. What could be causing this higher current consumption?

2. In the layout, I have the high voltage part in one side of the Tf and the rest in the other side. So For the feedback-resistive divider iks in the high voltage part and from there I have a looong track to the FBX pin. As it goes under the TF, the signal get really noisy. Any suggestion?

3. The transformer get a bit warm during operation. About 40C. Is it normal?

4. Any other topology you can recommend for this application?

Thanks in advance,
mfsd

 

You didn't use the LTSpice efficiency calculation facilities. Why not?
I downloaded your .sch and loaded it into my LTSpice. I replaced your load resistor with a current source acting as a 1mA load; the efficiency calculation requires exactly 1 voltage source and 1 current source. Besides, your original 1MEG load resistor would have only drawn a 450uA current.

D1 and D2's limits were being exceeded, so I replaced them with different diodes; D1's reverse is still getting up to its' maximum, but that's the way it goes.

I moved the components closer together so that the schematic would still be readable when tiled vertically. I changed R8/R9 so that R8 would be a standard value of resistance and dissipate less power. It may be too high a resistance for the input resistance of U1; you'll have to experiment along with reading the datasheet. I started V(out) @ 440v so that the simulation would finish more quickly.

I'm getting 699mW in @ 14v, which translates to 50mA current - exactly what you're seeing. Stable state efficiency with a 1mA current load is 64.7%; 247mW wasted.
Even if the efficiency were 100%, your input current would have to be at least ~32.3mA. I don't know how you thought your current draw was only 10mA; that would be impossible.

R10 in your snubber circuit is the big reason (~47% of the wasted power) for the inefficiency. Q1 has the next highest power dissipation; about 50% of R10's or ~22.7% of the wasted power. Those two items alone account for nearly 70% of the losses.

~65% efficiency isn't so bad considering the simplicity of the circuit. If you want better efficiency, you'll really need to go to a completely different topology. Flyback supplies are not among the more efficient switching supplies, but they are relatively simple and inexpensive.

You could increase the efficiency somewhat by selecting a MOSFET with a lower gate charge and lower Rds(on). {eta} (I tried one with better specs; it only made an 0.1% improvement).
But, total input power is under 0.7 Watts. You might be able to get that down in the neighborhood of 0.52 Watts with a different topology and a better transformer - will that 180mW savings make up for the increased cost and complexity?

 

After some more thinking about this circuit, decided to try a few more things.

I reduced R2 from 0.08 Ohms to 0.01 Ohms, and removed the RC filter from the sense input. This reduced the peak current through Q1 significantly, along with power dissipation in Q1.
I reduced the snubbing resistor R10 from 22 Ohms to 7.5 Ohms, which reduced its' power loss significantly, while not appreciably increasing peak Vds.
You'd inadvertently swapped the values for C2 and R5; instead of 22uF and 6.8k, they are supposed to be 6.8uF and 22k. This helps snub the overshoot/undershoot quite a bit.
I increased R1 from 140k to 200k to decrease the frequency from 100kHz to ~73kHz, reducing switching losses in Q1 a bit.
Resulting efficiency is 72.6% with a 1mA load, nearly 8% improvement.

You might be able to improve it somewhat, but at this point small gains will require significant experimentation. Your mileage will vary.

[eta]
On more checking, I found that the efficiency reached nearly 80% with 9v input, but won't run at over 17.5v in. The latter part I'm not sure why at the moment.
You should disconnect SHDN\ from Vin, and then create a voltage divider using a 200k resistor from Vin to SHDN\, and a 39k resistor from SHDN\ to ground. This will prevent the regulator from starting until Vin reaches 8v, and if the input drops below ~7.77v it will shut down again.

 

Thank you very much SgtWookie.
I will try out your suggestions in the prototype and I will post my results later.

 

Hello....

After some testing, I got a decent efficiency of about 60%.
Now, my big concern is the current-spike in the primary side of the transformer.
I am using the coilcraft DA2032, which has a rated Ipeak of 3A; and the spike is of about 6A. It can be also be seen on the simulations.

Any thoughts about this?

Thanks again,

 

60% is not so good.
If your inductor is only rated for 3A and you're seeing 6A spikes, you are saturating the inductor.

If you increase R2, the sense resistor, from 10m to 20m, that should keep the inductor current below 3A except for a brief period during startup. There are some spike artifacts in the simulation that occur at MOSFET turn-on; I'm ignoring them. To compensate for the lower current through L1, I increased the frequency by dropping R1 to 82k. That pair of adjustments caused an efficency hit; down to ~61%

I removed R10 and C7, and went back to 200k for Rt (R1). Efficiency went from ~61% to 73%. Vds barely topped 60v, and then only during startup.

 

Thanks for your reply...

Ive tried that... but even increasing Rsense up to 0.1ohm, I still have those 6A spikes. I have assumed that the current through the primary is approx the same as the current through Rsense, so I am measuring this in the voltage over the the Rsense resistor (0.1ohm), and the screen-shoot of that signal on my scope can be seen in the attached file.

I added the Vg just for reference.

Another question, the datasheet of the LT3757 specifies 100k as the min sw freq. Have u worked with this IC at a lower freq. Do you see any impediment to go down from 100k? I have try it and it works... and as you have simulated works without any problem, but do u see any "side-effect"?

TA,

 

The spikes occur when the MOSFET first turns on. After some more experimentation, it appears to be due to the capacitive coupling from the gate to the drain and source terminals; adding a resistor between the MOSFET gate and the gate drive output reduces the spikes considerably, depending on the value of the resistor.

However, a simple resistor in the gate path causes increased power dissipation in the MOSFET during turn-off, and reduces power transfer to the load. Adding a Schottky diode (MBRS130L) in parallel with the gate resistor gives a reduced spike during turn-on, and a rapid gate discharge path for turn-off. The slow turn-on time decreases total circuit power dissipation, as Q1 and the components surrounding Q1 don't see that large current spike. Since L1 is operating in discontinuous mode, current flow through it at the beginning of MOSFET turn-on is zero.

With the particular MOSFET in use (Si7852DP), it seems that 30 to 39 Ohms of resistance in series with the gate is about right. Those spike peaks are reduced to around 3A peak. I increased the sense resistor R2 to 39m to limit peak current through L1 to ~3A.

The simulation now reports an efficiency of 81.6%, which is quite an improvement.

Your mileage may vary considerably, depending on your selection of components, and differences between simulated components and real-world components. SPICE simulations merely provide a "ballpark" estimate of what you might be able to achieve during testing.

See the attached.

 

<snip>
Another question, the datasheet of the LT3757 specifies 100k as the min sw freq. Have u worked with this IC at a lower freq. Do you see any impediment to go down from 100k? I have try it and it works... and as you have simulated works without any problem, but do u see any "side-effect"?

Quite frankly, I overlooked that specification in the datasheet, and it is good that you caught my error. I'll rescind my former suggestion about operating the regulator at under 100kHz; as that is the minimum frequency recommended for operation by Linear Technology.

I decreased Rt back to 140k, and re-ran the simulation. Efficiency actually increased from 81.6% to 82.7%. In older simulations without the gate charge/discharge path modifications, the spikes across the components around Q1 during turn-on were causing significant power dissipation. Now that the capacitive coupling through Q1 is gone, that power loss has disappeared; so increasing the frequency and decreasing the peak current might result in improved efficiency.

I increased the gate resistor to 36 Ohms; that appeared to boost efficiency from 82.7% to 82.8%.

Decreasing Rt (R1) to 100k resulted in efficiency dropping from 82.8% to 80.2% and the switching frequency increased to around 136kHz, so without changing anything else simply increasing the frequency won't help; I changed R1 back to 140k.

[eta] Most recent simulation attached. Note the virtual elimination of spikes through the sense resistor after increasing R7 to 36 Ohms.

Selecting a Q1 with a lower Rds(on) might help improve the efficiency, but increased gate charge will cause losses.

 

I forgot that I'd decreased the input voltage from 14v to 8v to see how it would operate there. Going back to 14v in, the spikes returned and efficiency dropped to ~75%, - so, more experimentation is called for.

[eta]
As a compromise, I increased the gate resistor to 47 Ohms. Efficiency went back up to 79.6% with the input at 14v.
Now, the gate resistor is just behind the MOSFET in power dissipation, at 28mW vs 30mW.
Just to double-check, went back to 8v in, efficiency there is 83%.

That's really quite good for a flyback configuration. I don't think I'll be able to help improve it much more than that.

 

Thank you very much for such a clever idea. It should really help.

I will get back with the result of the testing in my prototypes.

Best regards