Looking for some help with my schematic

Discussion in 'The Projects Forum' started by gte, Sep 30, 2013.

  1. gte

    Thread Starter Active Member

    Sep 18, 2009
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    A is supplied with 2.2vDc
    B is supplied with 1.65vDc
    C is supplied with 1.9vDc


    When A is receiving power, I want it to charge the capacitor and not allow the PNP to conduct. When it turns off I want it to provide a ~ 1 second burst of 2.2v to the sensor allowing the PNP to conduct and discharge the capacitor.

    When C is receiving power with B, I want it to provide 1.9v with a 10% oscillation to the sensor, when off, no additional voltage.

    When B is receiving power only, I want it to provide 1.65v with a 10% oscillation to the sensor.

    Thanks for reading ... thoughts, critiques?

    [​IMG]
     
  2. Bernard

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    Here is a strange answer to a strange question. Switches are 4066- logic controlled analog or digital. Reset is NPN rather than PNP in question.
     
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  3. gte

    Thread Starter Active Member

    Sep 18, 2009
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    Thanks for the reply Bernard.

    Your riddle has me a bit confused.

    Also, what do the switches represent in your diagram? With my circuit, they all have to be automatic and self sensing. Are your switches meant to be manual?


     
  4. shortbus

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    Sep 30, 2009
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    Quote gte, "When A is receiving power, I want it to charge the capacitor and not allow the PNP to conduct. When it turns off I want it to provide a ~ 1 second burst of 2.2v to the sensor allowing the PNP to conduct and discharge the capacitor.

    When C is receiving power with B, I want it to provide 1.9v with a 10% oscillation to the sensor, when off, no additional voltage.

    When B is receiving power only, I want it to provide 1.65v with a 10% oscillation to the sensor.

    Thanks for reading ... thoughts, critiques?" End quote.

    A capacitor that can give a, " ~ 1 second burst", would be really big.

    In your schematic/circuit, where are you making the "10% oscillation" ?
     
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  5. Bernard

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    We have no information on what controls the logic inputs, A, B, & C, maybe a MC? 10% refers to 10% duty cycle from 555 oscillator, freq. ??
    " When it turns off I want it to provide a 1 sec burst"; interp as a 1 sec closing of SW 2,via 555-1meg & 1 μF.
    If A,B, & C are self sensing, it would be helpfull to know what they are sensing.
     
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  6. gte

    Thread Starter Active Member

    Sep 18, 2009
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    The 10% oscillation is a requirement I have to meet for the existing system.

    Let's make it a 1/4 second burst then, a full second is overkill.


    It's an existing system, I was trying to keep it simple so I did not reference that in the drawing. It's a uC that I do not have access to program or modify, I only have the measured outputs.

     
  7. Bernard

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    Still clear as mud. What is purpose of charging cap? What is the output of μC, a logic signal or the different voltages?
     
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  8. gte

    Thread Starter Active Member

    Sep 18, 2009
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    The output from the uC are the different voltage values.

    The charging cap was my attempt at a voltage oscillator, apparently my memory serves me incorrectly on how to create a simple dc signal oscillator. Maybe we can start there, how do I do that? I'd like to take the 1.90vDc and vary the signal about 10% downward to 1.71v and then back up to 1.9v.


     
  9. Bernard

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    Can we assume that the μC output is of low enough impedance so that a simple switched V divider can give the " 10% oscillation" & that sensor is high Z so that some series input resistance will not effect measurement? What is the frequency & duty cycle of the oscillation?
    " When C is receiving power"; this part confuses me--" when off, no additional voltage." Now slightly less confused.
     
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  10. gte

    Thread Starter Active Member

    Sep 18, 2009
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    Yes it is low impedance and input resistance should not effect measurement.

    Right now there is no duty cycle, just analog voltage and I need to introduce the oscillation to simulate real world pressure fluctuations. To be less confusing, I would like to start with getting "C" working only.

    Today while googling and trying to only get the "C" portion working, I found the circuit pictured below.

    At this point, I would like to take ~1.9vDC analog and use the 555 to have it oscillate 10% lower to ~1.71vDC. If I can get this circuit to work, I was just going to drive a simple NPN transistor with it (frequency unknown at this point) and have it drop voltage for a few hundredths of a second to ~1.71vDC while conducting and then stop conducting for the remaining 90+ hundredths of a second keeping the voltage ~1.9vDC. Does that sound less confusing?



    [​IMG]



     
  11. Bernard

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    OK, period = 1.2 s, duty 25 %. Attached is outline of the whole thing. Comparators are used to convert low level DC V to logic levels, so CA is logic level output A, etc. For ckt. C, if only CC is high, then 555, J, reset is released, allowing it to oscillate at 1.2 s, .3s hi. .9s low. When hi, L conducts, taking input to SW 3 to 1.71V for .3s. If satisfactory, can add pin nos. & values.
     
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  12. gte

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    Sep 18, 2009
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    That looks solid, except it should be .9s high, .3 low for the 1.9v portion of the circuit. I don't have a 585, just a few 555's, so I'll have to get that off of the internet.

    Can I build just the 1.9v oscillation portion by itself first? I'd like to start at that and build it from there ... it will make it easier for me to bring it to fruition if I build it in parts.
     
  13. Bernard

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    See if this works. There is no 585, just bad penmanship, all are 555's. Invertors G & H are made up from spare SW4 & comp. CL.
    Chew on these for awhile & post your questions.
     
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  14. gte

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    Sep 18, 2009
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    Hi Bernard,

    I'm still not sure how this circuit works, so I have not built it, I've been looking at it for the past 10 days shamefully enough.

    I've tried to break it apart via each input, but am not able to do that either.

    I will try and talk this through while typing as best as I can ... it looks like there is a resistor ladder that gives a reference voltage of 0.55v to each comparator. (5v and 5.6k/1k)

    IC D closes a switch for 250mS to give the sensor 2.2vDc, but I don't see how it is triggered.

    Comparator B (I don't understand why its output is biased high, is this a pull up resistor for the AND gate?) compares the reference voltage of .55 to 1.65, so its output is always 1.65v out to the AND gate

    Comparator C (I don't understand why its output is biased high, is this a pull up resistor for the AND gate?) compares the reference voltage of .55 to 1.9v, so its output is always 1.9v to the AND gate, to two pins of the AND gate? For a reason I don't know, the output of the AND gate goes to the reset pin of a 555 IC (F) to disable it and to a switch?

    555 IC (F) looks to vary the voltage going through SW2 by sending its output to a transistors base.

    So I believe if I wanted to start out with baby steps, I could build the circuit below to just oscillate the voltage value when it is at 1.9v? I still don't understand what SW2 is for though ... unless it is to close a relay to allow that path to conduct? If so, I can remove that for this.




    [​IMG]
     
  15. Bernard

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    The comparators are open collector, so need a pull-up resistor. If the - input is at .75 V & the + input is less than .75 V the output will be low, but if + in goes higher, the output switches to open circuit causing pullup R to stop conducting allowicg output to go to a positive 5V. We now have a logic level V for each analog V.
    Now for short form of μP to output 1.9V. The NC PB SW, normally closed push button switch, represents B & C activation. At rest, IC F is reset, SW 2 open, & L non conducting. so if monitoring SW2- 3 , =1.9 V [ for this demonstration 1.9V permanently connected ] but no V going to sensor.
    Press PB SW , F starts oscillating, a short high on L base brings collector to ground dropping SW2-3 to 1.7 V, SW2-5, control is high so sw is closed, sensor receives alternating 1.9V, .9s, & 1.7V, .3s. The 4066 needs +5V on pin 14 & ground on pin 7. More later, just had two molars extracted today- not feeling great.
     
    Last edited: Oct 18, 2013
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  16. Bernard

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    A, 2.2V, is applied to ckt for a given time, " When it turns off I want it to provide a 250 ms burst of 2.2V to the sensor".
    When A is applied to comparator CA + input, it is higher than .75 V ref, so output goes high, see fig 1. When A is removed, CA-2 goes low. Only the higher frequencys from the leading & trailing edges can pass thru the .01 μF cap causing a + & - V spike to D-2. The + spike has no effect on D but _ spike is sufficiently low to trigger D, causing a + 250 ms pulse at D-3. As A is no longer present , a 2.2V signal is provided by a V divider, see fig 2. When D-3 is high, applying a high control V to SW1 which connects the 2.2V to the sensor for 250 ms.
     
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  17. gte

    Thread Starter Active Member

    Sep 18, 2009
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    Hi Bernard,

    Thank you for taking the time to break this down to me, especially after the dentist visit.

    I have rearranged the circuit from yesterday to something that I think I will be able to process better when sitting at the breadboard and not be confused. Can you tell me (by looking at the circuit) if I understand correctly and haven't broken its functionality? I believe I can eliminate SW2 (4066) if I understand its functionality correctly (It appears to be 4 relays inside of an IC? If so, that is pretty awesome and I will be ordering some of those)?

    It appears that when I press the NC switch (PB SW NC) I will turn on the oscillation because of the 10k pull up resistor activating the 555, which then will oscillate turning transistor L on and off to achieve the oscillation.

    The only thing I'm not sure if I need or not is RL/100k, what is that for?

    [​IMG]
     
  18. Bernard

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    The sensor is on the wrong side of the 1k R, sensor receives 1.9V thru the 1k except when F-3 is high, grounding the 9k, dropping the output to 1.7V. 4066 SWs are not perfect as there is some contact resistance of a few 100's Ωs, & a small bit of leakage when off,; when lookeng into an infinite load some signal would pass thru, with a finite load, say 100k, maybe a milli V or 2. With 100k load the sensor sees 1.88V rather than the 1.9V due to small drop from 1k, still 98.9 % accurate.
     
    Last edited: Oct 18, 2013
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  19. gte

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    Sep 18, 2009
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    Ok, so I have to have the resistor inline to create the voltage divider.

    In this test scenario because it is broken into smaller pieces to start, the sensor will generate the 1.9v, the circuit oscillates the voltage and a measurement device will interpolate the voltage values.

    I believe I've correct my interpretation to the way you've instructed. Do I need the RL 100k? Thanks for the info on the sw4066's, I will be ordering some of those.

    [​IMG]


     
  20. Bernard

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    'Will try this once more- or more if necessory
     
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