the logic gate not, and, or gate in matrix representation, I have no idea how they works, and why they are drew in this way, google it give me no luck, anyone know about it? further explaination appreciated.

Not gate:
01
10

And gate:
1110
0001

Not gate:
1000
0111

 

http://www.allaboutcircuits.com/vol_4/chpt_3/index.html

 

If one-bit state is represented by
0 = [ 1 0 ]'
1 = [ 0 1 ]'
and two-bit state is represented by the following vector or 4x1 matrices (similar to quantum mechanics)
00 = [ 1 0 0 0 ]'
01 = [ 0 1 0 0 ]'
10 = [ 0 0 1 0 ]'
11 = [ 0 0 0 1 ]'
then an AND gate can be represented by a 2x4 matrix:
1 1 1 0
0 0 0 1

It's easy to verify gate_matrix x 2bit_state_matrix = 1bit_state_matrix.

Other logic operation gates include:
NAND:
0 0 0 1
1 1 1 0
OR:
1 0 0 0
0 1 1 1
NOR:
0 1 1 1
1 0 0 0