LMF100 as a variable fitler - trying to smooth the output

Discussion in 'General Electronics Chat' started by atferrari, Nov 19, 2011.

  1. atferrari

    Thread Starter AAC Fanatic!

    Jan 6, 2004
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    A square wave ranging from 10 to 1000 Hz is filtered with an LMF100 (switched capacitors filter - bandpass) to obtain a sine wave.

    Using fCLK/f0 = 100:1, fCLK goes from 1000 Hz to 100 KHz.

    Basically it works, but, to smooth the step-like output, I intend to use a single lowpass RC cell as the datasheet reccomends.

    Problem is that an RC filter able to stop the 1000 Hz (fCLK) at the lower range is affecting my output at the upper end (1000 Hz as well).

    I feel I am going in circles loosing the advantages of a continuously variable filter as implemented.

    Still in square one and perplex, wondering how the pros do it.

    BTW my idea is not to start switching things along the range. Oh no!

    Ideas anyone?
     
  2. crutschow

    Expert

    Mar 14, 2008
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    You might try a two-pole (or greater) active low-pass filter at the LMF100 output with a LP corner just sufficient to pass a 100kHz sine-wave.
     
  3. atferrari

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    Jan 6, 2004
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    That would alllow fCLK to show up along the whole range: 100 Khz down to 1 Khz...! which is what I do not want.

    My sine wave goes just from 10 to 1000 Hz.
     
  4. crutschow

    Expert

    Mar 14, 2008
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    Sorry, I misread your post.:rolleyes:

    Of course it should be a multi-pole LP filter with the corner frequency slightly above 1kHz.
     
  5. atferrari

    Thread Starter AAC Fanatic!

    Jan 6, 2004
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    Problem solved... with the KISS principle still intact.

    I implemented a single-pole RC filter for the upper end with:
    R = 39 K
    C = 0,0033 uF (permanent)

    Later, I programmed the micro in charge to switch, via NPN transistors, additional caps at two convenient frequencies, in parallel with the "permanent" one.

    At 307 Hz C = 0,01 uF (added in parallel to the above)

    At 36 Hz, C = 0,1 uF (added in parallel to both above).

    Today is a nice day! A saga of false starts, wrong designs, lack of adequate testing and ignorance of basic concepts, lasting several years, is over. :p :p :p
     
    Last edited: Nov 19, 2011
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