LM555 astable oscillation INITIAL delay.

Discussion in 'The Projects Forum' started by AJFishdude, Aug 11, 2009.

  1. AJFishdude

    Thread Starter New Member

    Aug 11, 2009
    4
    0
    Hey everyone, I am currently working on an LED display project for a friend. The basic circuitry is such that, there are four banks of 10 (40 in total) super bright white LEDs that pulse on and off in a 40 second period. So bank one on for 0-10s, bank two on for 10-20s and so on. How I am controlling this is with two LM555 timers that oscillate in the astable mode, one with a 20 second period (off 10 on 10), the other with a 40 second period (off 20 on 20). To generate the 50% duty cycle, I used the 50% cycle equations and schematic that can be found on all of the LM555 data sheets. I did NOT use the standard LM555 astable setup. See page 10 on this PDF for the setup I used http://www.national.com/ds/LM/LM555.pdf. I then run these signals through the appropriate NAND gates to light up each bank of LEDs separately. My digital logic is very simple, just four states, 00, 01, 10, 11, one for each bank.

    I understand how to set up my timers and do the logic, and have all that working, but here is my question. For whatever reason, both of the timers when I first turn the circuit on, do not oscillate correctly initially. Instead of following their defined periods, they both stay on longer than they should. After that initial strange period, both give output exactly as I would expect them to, correct periods for each. I am wondering if the LM555s have some sort of initial charge time for the timing capacitor when you first turn them on. My problem is that, the two timers have slightly different initial delays, meaning that my waveforms that drive my logic are out of sync by about 2 seconds. Obviously this is going to change the functionality of my LEDs, and is something that I need to overcome. I don't have my schematic on my computer yet (did it by hand first) but I will try and get it up. Just so you know, I am currently using 1000uF electrolytic caps on both 555s. If you want more details I can give them, but at the moment I just want to see if anyone has any ideas about how to get around this problem, I really think it has something to do with the large timing caps. I could try using a smaller cap and larger resistors, but I don't want to cut down too much voltage for the output signal, that is why I started with 1000uF. Any speculation you can give would be great. Thanks.
     
  2. jj_alukkas

    Well-Known Member

    Jan 8, 2009
    751
    5
    First of all please post the schematic ASAP. One diagram is worth more than a thousand words.

    Second, almost all electrolytic capacitors have a tolerance of +/-20%, which ruins all calculations. So When designing a 555 oscillator, it is wise to keep the capacitor as low as possible. Your capacitor could give a variation anywhere from 800uF to 1200uF or more in some cases. With that one point, the whole timing factor changes marginally. Try to use a maximum of 220uF. Resistors wasting current is adjustable compared to wrong timings. The time for a 1000uF to charge compared to charge leak is worser. The cap on one 555 will have a value different than the second even if that caps are from the same batch.

    Thirdly, if Pin 5 isn't tied to GND through a 0.01uF disc cap, the circuit sometimes behaves erratically.

    Always ensure that Ra>5k and Rb>3k for the correct Vcc division.

    If you need a finer calculation, I suggest you to use this software. www.555-timer.clarkson-uk.com

    A suggession : You could have made everything a lot easier if you had used a 555 with a 4017.
     
  3. AJFishdude

    Thread Starter New Member

    Aug 11, 2009
    4
    0
    Alright, thanks for the suggestions, these were exactly the kinds of things I was hoping people could tell me. I am an EE student and am still new to a lot of the finer characteristics of different ICs and components. I never knew that electrolytic caps were less accurate, good tip. I also was hoping there was another kind of IC out there that I could use for the driving of the LEDs, I will look into this 4017 you mentioned. As for the schematic, I will get it posted after I get home later today. Also, my Ra and Rb are both higher than 5k for both timers, I think my lowest value right now is 6.1k. Thanks again!
     
  4. jj_alukkas

    Well-Known Member

    Jan 8, 2009
    751
    5
    You are most welcome. If you need details on 4017 which might help you on future projects, download its datasheet. You can also get ideas about it on that website I posted above. Best of luck.
     
  5. AJFishdude

    Thread Starter New Member

    Aug 11, 2009
    4
    0
    So here are my schematics for this project. I didn't include the LED banks or logic arrays because that wasn't the functionality I was worried about, I just included the circuitry for the LM555 timers. The first one is the setup that was giving me those strange delays when I turned the circuit on. Also, as alukkas pointed out, there was a simpler way to do the same thing. The second circuit is my revised timer that can then drive a CD4017 which will in turn drive my LEDs. In the first schematic the left timer has a 20 second period, and the right one has a 40 second period. In the second schematic, the one timer has a 10 second period. I added in a 0.01uF disc cap between pin five and ground on the second schematic just to be safe. The weird thing though is that I am still getting strange results when I first turn the circuit on. Now with the new single timer, an LED will come on for about 8 seconds initially, and then go into the expected 5 on 5 off sequence. Any guesses as to why this is?
     
  6. SgtWookie

    Expert

    Jul 17, 2007
    22,182
    1,728
    Try splitting up your timing capacitor between ground and Vcc.

    For starters, you're using 1,000uF timing caps. Those are mighty large. Let's cut the total value down to 100uF. Increase the resistors to compensate.

    Next, substitute three 33uF caps for the single 100uF caps. Connect two to ground for 66uF, and a single to Vcc, for a total of 99uF. Make certain you observe correct polarity on the caps when connecting them up.

    When you first apply Vcc, a single timing cap would have a charge of 0v. The threshold and trigger inputs look for 1/3 Vcc and 2/3 Vcc levels.

    By splitting the capacitance to have 2/3 of it going to ground, and 1/3 of it going to Vcc, when you first apply power the junction of the three caps will be at 1/3 Vcc automatically. You will no longer have the extended start-up delay.
     
  7. jj_alukkas

    Well-Known Member

    Jan 8, 2009
    751
    5
    I see that your Rb is not wired correctly which might be causing the problem. Try to rewire using this diagram which will work perfectly along with that low value cap. This circuit is for a 10s low and 10s high output. For a 20s low and 20s high, replace that 3M resistor with a 6M...

    [​IMG]
     
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