limited digital counter - isis proteus

absf

Joined Dec 29, 2010
1,968
Mr Carlos,

Your design was very modular and professional as compared to mine. One disavantage I can see is that the preset number can never be "00". Because as soon as you hit the reset switch, the "You get it" LED would be lighted.

The attached PNG is my 4 bit version of it.:D

Allen
 

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MrCarlos

Joined Jan 2, 2010
400
Hello

Well that's very easy to fix.
In this particular case: What would we want to do our design?
Let's analyze a little:
With the current circuit, "You Get It" LED lights when A=B.
Now: If We program AA=00 this LED light by pressing the RESET button.
but we do not want that.
So: NOT "You Get It" light If Ad = 0, &, Au = 0, & RESET.
"Ad" means: tens value setting.
"Au" means: units value setting.

I suppose we could modify our 4: Logic Circuitry to achieve the new target.

I am analyzing the absf scheme (Attachment is post #21) with the intention of making some recommendations for use in future projects.

I'm sorry for the delay
 

MrCarlos

Joined Jan 2, 2010
400
Hello I'm back.

Remember: I'm not here to point out things that are wrong but to make some recommendations for improvement.
Of course I'm no expert on this.

Please keep in sight the image "absf design 21.jpg"
I hope I did not wrong to rewire his circuit.

The design of absf has, more or less, the same effect he said.
If PRESET NUMBER is set to 0, turning on the circuit will turn on the light BINGO regardless of the combination of switches GUESSED NUMBER.
This is because when you first polarizes a Flip-Flop, any, its Q is set to 0.
Not always but in most cases.

Looking to comparator U2, we know that any of their 3 outputs will have a 1, so the NAND gate "U1: A" will always have a 1 in its PIN 2 so that gate could be replaced by an inverter. . . . Right?

Let me talk a little bit about De'Morgan gates and their uses.
The OR gate "U3: A" is telling us that:
If U2 QA=B OR U4 Q3 = 1 its output will be 1.
(Statement to the OR gate: Any 1 in any input will give us a 1 at its output.)

But we want to enable the 3: Attempts Counter when QA=B is 0 AND Q3 is 0.
Therefore the next gate of the equal sign will do more understandable our circuit.
(So 0 AND 0 will give 0 at its output)

We need a de-bounce circuit Between the GUESS button and NAND gate A1, PIN's 4, 5 & 1.
We know that mechanical switches always produce the bounce effect, giving results in the generation of multiple pulses.

Those who know say:
In digital circuits, never leave an undefined level input.
This is the case of U7 From D4 to D7.
Of course, the simulation works but if we build the circuit in reality, that could give us problems.

Do a test on the simulator: disconnect the A<B, A=B, A>B Inputs in U2.
It will work as before.
 

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Thread Starter

sryzdn

Joined Jun 1, 2014
27
Special attn: MrCarlos, absf

Hello,

Sorry for the delay. I am still working on this circuit.
My last conclusion was that I replaced 4017 with the following counter schema. Of course, the logic circuitry needs to be changed that is what I am working on and not yet got the desired answer.

Please see if it convinces you. If not, please correct me.
 

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MrCarlos

Joined Jan 2, 2010
400
Hello srysdn

!Ups!
To replace 4017. . . Why?
How did you come to that conclusion?.
I can not understand your idea.

Of course, the only thing that we need to improve is the: 4: Logic Circuitry.
Yes, according to the last messages that have been generated

The circuit you show in your post #24 could be useful; but is unfinished.
It looks like you want to add a 7 segments display to the system.
is this correct?
 

absf

Joined Dec 29, 2010
1,968
Hello

Well that's very easy to fix.
In this particular case: What would we want to do our design?
Let's analyze a little:
With the current circuit, "You Get It" LED lights when A=B.

Now: If We program AA=00 this LED light by pressing the RESET button.
but we do not want that.
So: NOT "You Get It" light If Ad = 0, &, Au = 0, & RESET.
"Ad" means: tens value setting.
"Au" means: units value setting.

I am analyzing the absf scheme (Attachment is post #21) with the intention of making some recommendations for use in future projects.
I followed your advice and inserted the logic:
[NOT "Bingo" light If Au = 0, & RESET] as attached by adding a NAND to the "Bingo" LED and a 4-input NOR to the thumbswitch.

But the LED was Off when the Reset button was pressed. After the button is released, and the debounce period of 2 seconds expired, the "Bingo" LED was still lighted. Any idea how to solve this?

Allen
 

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absf

Joined Dec 29, 2010
1,968
Special attn: MrCarlos, absf

Hello,

Sorry for the delay. I am still working on this circuit.
My last conclusion was that I replaced 4017 with the following counter schema. Of course, the logic circuitry needs to be changed that is what I am working on and not yet got the desired answer.

Please see if it convinces you. If not, please correct me.
If you connect the JK F/F like what you did, it would count 00,11,10,01. You cannot leave J,K,S & R un-connected or it will not work.

The 4-input display LED is just for modelling purpose. You would need a 7-segment decoder like 7447 or 4511 chip to decode binary to 7-segment patterns. Unless you are able to get the rare TIL311 LED display with micro chips built-in.

http://www.ti.com/lit/ds/symlink/til311.pdf

Allen
 

MrCarlos

Joined Jan 2, 2010
400
Hello absf

In reply to your message #26:

In my message #23 I Said:
The design of absf has, more or less, the same effect he said.
If PRESET NUMBER is set to 0, turning on the circuit will turn on the light BINGO regardless of the combination of switches GUESSED NUMBER.
This is because when you first polarizes a Flip-Flop, any, its Q is set to 0.
Not always but in most cases.

And You say in your message #26:
[NOT "Bingo" light If Au = 0, & RESET] as attached by adding a NAND to the "Bingo" LED and a 4-input NOR to the thumbswitch.

Carefully read your statement:
NOT BINGO light If Au = 0, & RESET.
This means: light BINGO will turn off when Au = 0 AND RESET signal is true (0).

But with the NAND gate you added it you're saying:
NOT BINGO light If Au = 1 AND Reset = 1.
Which is not what we want.

You statement is correct but when you add the gate, here is where you need to improve.
Look closely:
BINGO NOT light If Au = 0, & RESET.
This means BINGO light will turn off when Au = 0 AND RESET signal is true (0).

Here is where De'Morgan gates, give us possibilities to advance the project.
See:
NO turn the BINGO on. Need a 0. . . Right?
So 0 AND 0 = 0.
An De'Morgan OR gate with 2 inputs could work here.

But we're forgetting something.
The BINGO LED should light when:
A=B, in the first, second or third attempt. . . Right ?
Therefore this new modification to our circuit must include the signal A=B. . . Right?

I also recommend replacing the NOR gate U5:A.
The NOR gate is telling us that any one will give 0 at its output.
But we want that when A=0, the gate give us a 0 at its output.

Make another attempt.
 

absf

Joined Dec 29, 2010
1,968
Thank you Mr Carlos,

Here's another attempt that I tried to rectify the problem. I'd do the write-up on my next post. Attached is the proteus schematic and the DSN file. Took me almost 2 hours to do it. Now I have to go and prepare my breakfast, then go to work.

cheers!


Allen
 

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absf

Joined Dec 29, 2010
1,968
Here's a short description on how my circuit attached on post #30 works:

When "Preset Number" = 0 and "Guessed number" = 0

1) After "reset" is pressed, U10:A F/F Q output =0. So LReset =0, Au =0.

2) U3D OR output becomes 0 thus "Bingo" LED is not lighted.

3) When "GUESS" button is pressed, The 'Guess clock is checked through
U8:C AND gate with Trial0=1, to step the U10:A F/F.
So output Q (LReset) of F/F becomes 1.

4) When LReset=1 and Au=0 (due to Preset Number=0), U3D output
beomes 1.

5) Guess clock would also step U4 counter through U1:A NAND gate so Q0 would advance to Q1.

6) When Q1 of counter =1 would also make U9:A output V_attempt =1.

7) On U8:B AND gate, V_attempt=1 and "QA=B" also =1, So U8:B output=1

8) Since U8:B o/p =1 and U3D o/p=1 (see #4), "Bingo" LED is lighted.

*U4B 74HC32 is not needed anymore.
*I have to change U3:D to U3D or else it becomes a smilie.

Allen

p.s. Mr Carlos, how do you change the border size in the ISIS and how to create extra borders to enclose your modules? Thanks
 
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MrCarlos

Joined Jan 2, 2010
400
Hello absf

!oh! Yes, I see where the signal 'GUESS comes. Thanks.

In regard to your last contribution in post #33 design 26A modified.jpg.

I think this contribution complies in much the expectations of sryzdn OP.
we could improve it a little more if we replace the NOR gate (U5:A) by an OR gate and remove the associated inverter.

I can not even understand the purpose of the NAND (U1:A) gate.
One of its inputs is ALWAYS High, PIN 2
So the state of its output depends only on its other input PIN 1.
could be replaced by an inverter and associated diodes would not be used can also be removed.

The only thing I can say is: "You have gotten"
 
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