Hi!
I wanted to ask if it is possible to design circuit for
parallel-in/serial-out left shift register with T Flip flops?
S.R

 

In theory, yes.

But using anything else than a D-FF or even a JK-FF would be unnecessary trouble.

 

So when i want to draw a circuit...i just have to draw it
with JK flip-flops applying +5 volts to them(to be in toggle mode)
?

 

You will need to use a logic gate to convert the T-FF into a D-FF.

Why do you need to use a T-FF anyway?

 

It's for my homework assignment and i can't figure out it...

 

Assuming you can design a shift register out of a D-FF, let's focus in converting a T-FF into a D-FF.

The line of thought is to put a logic gate between the T-FF and its input, so that it behaves as a D-FF.
The D-FF is supposed to store whatever it is given to it in the next cycle. That said, let's look at an example:
If a T-FF has 1 stored in it, and receives a 1, it should retain that value. Thus, it should receive a 0 to its T input.
If it has 0 stored and it receives a 1, it should toggle, and thus receive a 1 to its T input.

Complete a table with all those 4 cases and post it. The choice of the 2-input logic gate should be apparent by then.

 

Well my teahcer told me that i shouldnt convert T-FF into D...

 

Has he given you another hint? There might be an alternative way. It would involve building an Finite State Machine cell, which would implement the Shift, Load and Hold functions of the register.

Basically, use the T-FF to create the cell, in pretty much the same way you use the D-FF. It's just that the functions will be different.