Latch circuit designing.

Thread Starter

Isidoro Ibañez Labiano

Joined Nov 4, 2016
28
Hello all,

I am design a latch circuit, so far I am able to SET, but I do not know how to RESET it.
Any guide or advise on this issue?
Bellow you can check my schematic on LTSpice.
upload_2016-11-4_12-6-45.png

Thanks!!!
Cheers,
Isidoro
 

ericgibbs

Joined Jan 29, 2010
18,767
hi,
Is this what you are trying to do,?
Note: I have used my model of the Switch, also 2N2222A transistors.
They are pulsed closed for Set and Reset, using a PWL list.

E
 

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AnalogKid

Joined Aug 1, 2013
10,989
Q1 and Q2 must be NPN.
Q1's emitter is not connected.
What is the purpose of M5? it is permanently OFF all of the time.
Gate drive to M1 is a bit light. Increase R3 to 100K.

ak
 

Thread Starter

Isidoro Ibañez Labiano

Joined Nov 4, 2016
28
hi,
Is this what you are trying to do,?
Note: I have used my model of the Switch, also 2N2222A transistors.
They are pulsed closed for Set and Reset, using a PWL list.

E
Yes, that is my goal.
Do you think that those different components are the cause of the wrong behavior of my circuit?

Thanks for your time again!
 

ericgibbs

Joined Jan 29, 2010
18,767
hi II,
The PNP transistors are wrong they should be NPN, the switch I use is a typical switch for LTSpice, I do not have the details of your switch.?
You should also have the 27K resistors from Base to 0v.
E

EDIT:
Replace my Switch for yours in this asc file.
 

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Thread Starter

Isidoro Ibañez Labiano

Joined Nov 4, 2016
28
Thanks Ericgibbs & Analogkid!

Q1 not connected was a "typo", I have changed to NPN.
I run your ( @ericgibbs ) ASC, but the output is high from the begining. The idea is that the circuit behaves as depicted in your figure.

Regards,
 

Thread Starter

Isidoro Ibañez Labiano

Joined Nov 4, 2016
28
None, it should be removed. But I have to discuss it with my colleague.
I have checked that if I disconnect the base of Q2 (removing R4), then the behavior is as desired.
 

ericgibbs

Joined Jan 29, 2010
18,767
hi,
The circuit sim works fine in the version I posted, ie: 0V on Vout until Set then 8Vout , until Reset back to 0v.
Post your latest asc file, you have made a mistake somewhere.
E
 

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ericgibbs

Joined Jan 29, 2010
18,767
hi II,
The reason that the Vout is at +8v at switch ON is random chance which bistable transistor goes into conduction first.
I have changed R9 to 2k2 in order to force the bistable into the reset state when the sim is run.

In a final actual design you should ensure that 'res' held ON during power up.

E

EDIT:

Added 2nd sim with the res/set pulses repeated, this shows the Vout is controlled.
 

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Last edited:

crutschow

Joined Mar 14, 2008
34,285
Changing R9 to 2.2k may work in simulation to establish the initial state but is that enough to guarantee it works on the actual circuit?
 

ericgibbs

Joined Jan 29, 2010
18,767
the initial state but is that enough to guarantee it works on the actual circuit?
No, that's why I noted, both in text and on the circuit
In a final actual design you should ensure that 'res' held ON during power up.
 

crutschow

Joined Mar 14, 2008
34,285
No, that's why I noted, both in text and on the circuit
In a final actual design you should ensure that 'res' held ON during power up.
Okay.
But I'm still puzzled as to why you suggested a circuit change that's only for simulation purposes. :confused:
Just change the sim to have 'res' initially ON per your suggestion.
 

ericgibbs

Joined Jan 29, 2010
18,767
In post #13, the TS expressed concern over the Vout being +8v at the start of the sim.
He also posted:
I run your ASC, but the output is high from the begining. The idea is that the circuit behaves as depicted in your figure.

But I'm still puzzled as to why you suggested a circuit change that's only for simulation purposes
I obviously did not want him to assume that the 2k2 would ensure that Vout would be 0v at power up by just changing the value to 2k2 and he must provide a power up Reset circuit.

I cannot see why you are having a problem, it seems pretty clear to me and the TS.

E
 
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