JK flip flop triggering

Discussion in 'General Electronics Chat' started by mekagami12, Feb 20, 2004.

  1. mekagami12

    Thread Starter New Member

    Feb 20, 2004
    1
    0
    :( Hello there,

    I am a student and we are doing this project of ours about precision timing using 555 timer and JK flip flop. My question is how can we triggered the flip flop only once whether it is a positive edge triggering one or negative edge triggering from the total clock pulse.Thank you so much.


    Waiting for a reply,

    dylan
     
  2. Dave

    Retired Moderator

    Nov 17, 2003
    6,960
    143
    I'm not sure from just a timer/JK-Bistable configuration that it is possible, because the bistable will continue to operate according to the excitation rules. So for a continuous clock the outputs at Q and notQ will be constantly changing. The only feasible way is to instigate a set or reset after the clock pulse to maintain your ouput values. So if your clock pulse (whether it be high or low) sends Q to '0' or '1', instigate the 'reset' or 'set' respectively to hold it there, I think that is the correct way around.

    Maybe you could tell us more about your circuit design to give us a better idea of what you're doing.
     
Loading...